Searched refs:max_cu_per_sh (Results 1 – 19 of 19) sorted by relevance
478 adev->gfx.config.max_cu_per_sh = gfx_info->v24.max_cu_per_sh; in amdgpu_atomfirmware_get_gfx_info()
1538 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_cu_per_sh); in gfx_v6_0_get_cu_enabled()1588 adev->gfx.config.max_cu_per_sh = 8; in gfx_v6_0_constants_init()1605 adev->gfx.config.max_cu_per_sh = 5; in gfx_v6_0_constants_init()1622 adev->gfx.config.max_cu_per_sh = 5; in gfx_v6_0_constants_init()1639 adev->gfx.config.max_cu_per_sh = 6; in gfx_v6_0_constants_init()1656 adev->gfx.config.max_cu_per_sh = 5; in gfx_v6_0_constants_init()3598 ao_cu_num = adev->gfx.config.max_cu_per_sh; in gfx_v6_0_get_cu_info()3617 for (k = 0; k < adev->gfx.config.max_cu_per_sh; k++) { in gfx_v6_0_get_cu_info()
143 unsigned max_cu_per_sh; member
390 adev->gfx.config.max_cu_per_sh = 2 * (le32_to_cpu(gc_info->gc_num_wgp0_per_sa) + in amdgpu_discovery_get_gfx_info()
3840 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_cu_per_sh); in gfx_v7_0_get_cu_active_bitmap()4278 adev->gfx.config.max_cu_per_sh = 7; in gfx_v7_0_gpu_early_init()4295 adev->gfx.config.max_cu_per_sh = 11; in gfx_v7_0_gpu_early_init()4312 adev->gfx.config.max_cu_per_sh = 8; in gfx_v7_0_gpu_early_init()4331 adev->gfx.config.max_cu_per_sh = 2; in gfx_v7_0_gpu_early_init()5165 ao_cu_num = adev->gfx.config.max_cu_per_sh; in gfx_v7_0_get_cu_info()5184 for (k = 0; k < adev->gfx.config.max_cu_per_sh; k ++) { in gfx_v7_0_get_cu_info()
461 cu_info->num_cu_per_sh = adev->gfx.config.max_cu_per_sh; in amdgpu_amdkfd_get_cu_info()
1696 adev->gfx.config.max_cu_per_sh = 6; in gfx_v8_0_gpu_early_init()1713 adev->gfx.config.max_cu_per_sh = 16; in gfx_v8_0_gpu_early_init()1760 adev->gfx.config.max_cu_per_sh = 8; in gfx_v8_0_gpu_early_init()1779 adev->gfx.config.max_cu_per_sh = 8; in gfx_v8_0_gpu_early_init()1796 adev->gfx.config.max_cu_per_sh = 3; in gfx_v8_0_gpu_early_init()1811 adev->gfx.config.max_cu_per_sh = 2; in gfx_v8_0_gpu_early_init()7053 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_cu_per_sh); in gfx_v8_0_get_cu_active_bitmap()7071 ao_cu_num = adev->gfx.config.max_cu_per_sh; in gfx_v8_0_get_cu_info()7088 for (k = 0; k < adev->gfx.config.max_cu_per_sh; k ++) { in gfx_v8_0_get_cu_info()
727 adev->gfx.config.max_cu_per_sh = gfx_info->info.max_cu_per_sh; in amdgpu_atombios_get_gfx_info()
1759 for (k = 0; k < adev->gfx.config.max_cu_per_sh; k ++) { in gfx_v9_0_init_always_on_cu_mask()4466 adev->gfx.config.max_cu_per_sh * in gfx_v9_0_do_edc_gpr_workarounds()6932 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_cu_per_sh); in gfx_v9_0_get_cu_active_bitmap()6983 for (k = 0; k < adev->gfx.config.max_cu_per_sh; k ++) { in gfx_v9_0_get_cu_info()6985 if (counter < adev->gfx.config.max_cu_per_sh) in gfx_v9_0_get_cu_info()
711 config[no_regs++] = adev->gfx.config.max_cu_per_sh; in amdgpu_debugfs_gca_config_read()
786 dev_info.num_cu_per_sh = adev->gfx.config.max_cu_per_sh; in amdgpu_info_ioctl()
1858 adev->gfx.config.max_cu_per_sh = le32_to_cpu(gpu_info_fw->gc_num_cu_per_sh); in amdgpu_device_parse_gpu_info_fw()3446 adev->gfx.config.max_cu_per_sh, in amdgpu_device_init()
4711 int max_wgp_per_sh = adev->gfx.config.max_cu_per_sh >> 1; in gfx_v10_0_tcp_harvest()8754 unsigned total_cu = adev->gfx.config.max_cu_per_sh * in gfx_v10_0_set_gds_init()8788 amdgpu_gfx_create_bitmask(adev->gfx.config.max_cu_per_sh >> 1); in gfx_v10_0_get_wgp_active_bitmap_per_sh()8840 for (k = 0; k < adev->gfx.config.max_cu_per_sh; k++) { in gfx_v10_0_get_cu_info()8842 if (counter < adev->gfx.config.max_cu_per_sh) in gfx_v10_0_get_cu_info()
413 *value = rdev->config.cik.max_cu_per_sh; in radeon_info_ioctl()415 *value = rdev->config.si.max_cu_per_sh; in radeon_info_ioctl()
3106 rdev->config.si.max_cu_per_sh = 8; in si_gpu_init()3123 rdev->config.si.max_cu_per_sh = 5; in si_gpu_init()3141 rdev->config.si.max_cu_per_sh = 5; in si_gpu_init()3158 rdev->config.si.max_cu_per_sh = 6; in si_gpu_init()3175 rdev->config.si.max_cu_per_sh = 5; in si_gpu_init()3298 rdev->config.si.max_cu_per_sh); in si_gpu_init()5314 for (i = 0; i < rdev->config.si.max_cu_per_sh; i ++) { in si_get_cu_active_bitmap()5333 for (k = 0; k < rdev->config.si.max_cu_per_sh; k++) { in si_init_ao_cu_mask()
3190 rdev->config.cik.max_cu_per_sh = 7; in cik_gpu_init()3207 rdev->config.cik.max_cu_per_sh = 11; in cik_gpu_init()3224 rdev->config.cik.max_cu_per_sh = 8; in cik_gpu_init()3243 rdev->config.cik.max_cu_per_sh = 2; in cik_gpu_init()6550 for (i = 0; i < rdev->config.cik.max_cu_per_sh; i ++) { in cik_get_cu_active_bitmap()6569 for (k = 0; k < rdev->config.cik.max_cu_per_sh; k ++) { in cik_init_ao_cu_mask()
2136 unsigned max_cu_per_sh; member2167 unsigned max_cu_per_sh; member
1394 uint8_t max_cu_per_sh; member1414 uint8_t max_cu_per_sh; member1439 uint8_t max_cu_per_sh; member
5652 UCHAR max_cu_per_sh; member
