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Searched refs:fence_udelay (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.10/drivers/clk/tegra/
Dclk-tegra20-emc.c95 fence_udelay(1, emc->reg); in emc_set_parent()
127 fence_udelay(1, emc->reg); in emc_set_rate()
162 fence_udelay(1, emc->reg); in emc_set_rate_and_parent()
Dclk-tegra210.c584 fence_udelay(1, clk_base); in tegra210_generic_mbist_war()
586 fence_udelay(1, clk_base); in tegra210_generic_mbist_war()
598 fence_udelay(1, clk_base); in tegra210_venc_mbist_war()
604 fence_udelay(1, clk_base); in tegra210_venc_mbist_war()
609 fence_udelay(1, clk_base); in tegra210_venc_mbist_war()
620 fence_udelay(1, clk_base); in tegra210_disp_mbist_war()
629 fence_udelay(1, clk_base); in tegra210_disp_mbist_war()
638 fence_udelay(1, clk_base); in tegra210_vic_mbist_war()
643 fence_udelay(1, vic_base + NV_PVIC_THI_SLCG_OVERRIDE_LOW); in tegra210_vic_mbist_war()
649 fence_udelay(1, clk_base); in tegra210_vic_mbist_war()
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Dclk-tegra-fixed.c117 fence_udelay(2, clk_base); in tegra_clk_osc_resume()
Dclk.c199 fence_udelay(5, clk_base); in tegra_clk_periph_resume()
205 fence_udelay(2, clk_base); in tegra_clk_periph_resume()
Dclk-sdmmc-mux.c158 fence_udelay(2, sdmmc_mux->reg); in clk_sdmmc_mux_set_rate()
Dclk.h916 #define fence_udelay(delay, reg) \ macro
Dclk-pll.c1862 fence_udelay(1, pll->clk_base); in _clk_plle_tegra_init_parent()