Lines Matching refs:fence_udelay
584 fence_udelay(1, clk_base); in tegra210_generic_mbist_war()
586 fence_udelay(1, clk_base); in tegra210_generic_mbist_war()
598 fence_udelay(1, clk_base); in tegra210_venc_mbist_war()
604 fence_udelay(1, clk_base); in tegra210_venc_mbist_war()
609 fence_udelay(1, clk_base); in tegra210_venc_mbist_war()
620 fence_udelay(1, clk_base); in tegra210_disp_mbist_war()
629 fence_udelay(1, clk_base); in tegra210_disp_mbist_war()
638 fence_udelay(1, clk_base); in tegra210_vic_mbist_war()
643 fence_udelay(1, vic_base + NV_PVIC_THI_SLCG_OVERRIDE_LOW); in tegra210_vic_mbist_war()
649 fence_udelay(1, clk_base); in tegra210_vic_mbist_war()
663 fence_udelay(1, clk_base); in tegra210_ape_mbist_war()
684 fence_udelay(1, clk_base); in tegra210_ape_mbist_war()
2863 fence_udelay(5, clk_base); in tegra210_enable_pllu()
2871 fence_udelay(1, clk_base); in tegra210_enable_pllu()
2922 fence_udelay(1, clk_base); in tegra210_init_pllu()
2927 fence_udelay(1, clk_base); in tegra210_init_pllu()
3450 fence_udelay(2, clk_base); in tegra210_clk_resume()