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Searched refs:feature_mask (Results 1 – 25 of 39) sorted by relevance

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/Linux-v5.10/drivers/gpu/drm/amd/pm/swsmu/
Dsmu_cmn.c320 uint32_t *feature_mask, in smu_cmn_get_enabled_mask() argument
327 if (!feature_mask || num < 2) in smu_cmn_get_enabled_mask()
339 feature_mask[0] = feature_mask_low; in smu_cmn_get_enabled_mask()
340 feature_mask[1] = feature_mask_high; in smu_cmn_get_enabled_mask()
342 bitmap_copy((unsigned long *)feature_mask, feature->enabled, in smu_cmn_get_enabled_mask()
350 uint64_t feature_mask, in smu_cmn_feature_update_enable_state() argument
359 lower_32_bits(feature_mask), in smu_cmn_feature_update_enable_state()
365 upper_32_bits(feature_mask), in smu_cmn_feature_update_enable_state()
372 lower_32_bits(feature_mask), in smu_cmn_feature_update_enable_state()
378 upper_32_bits(feature_mask), in smu_cmn_feature_update_enable_state()
[all …]
Dsmu_cmn.h52 uint32_t *feature_mask,
56 uint64_t feature_mask,
Dsmu_internal.h75 …e smu_get_allowed_feature_mask(smu, feature_mask, num) smu_ppt_funcs(get_allowed_feature_mask, 0,… argument
/Linux-v5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dhwmgr.c106 hwmgr->feature_mask &= ~(PP_VBI_TIME_SUPPORT_MASK | in hwmgr_early_init()
117 hwmgr->feature_mask &= ~PP_GFXOFF_MASK; in hwmgr_early_init()
122 hwmgr->feature_mask &= ~PP_GFXOFF_MASK; in hwmgr_early_init()
127 hwmgr->feature_mask &= ~ (PP_VBI_TIME_SUPPORT_MASK | in hwmgr_early_init()
135 hwmgr->feature_mask &= ~PP_VBI_TIME_SUPPORT_MASK; in hwmgr_early_init()
140 hwmgr->feature_mask &= ~ (PP_VBI_TIME_SUPPORT_MASK | in hwmgr_early_init()
148 hwmgr->feature_mask &= ~(PP_UVD_HANDSHAKE_MASK); in hwmgr_early_init()
153 hwmgr->feature_mask &= ~(PP_UVD_HANDSHAKE_MASK); in hwmgr_early_init()
164 hwmgr->feature_mask &= ~PP_GFXOFF_MASK; in hwmgr_early_init()
174 hwmgr->feature_mask &= ~PP_GFXOFF_MASK; in hwmgr_early_init()
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Dvega10_hwmgr.c118 hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
120 hwmgr->feature_mask & PP_SOCCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
122 hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
124 hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true; in vega10_set_default_registry_data()
127 hwmgr->feature_mask & PP_DCEFCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
129 if (hwmgr->feature_mask & PP_POWER_CONTAINMENT_MASK) { in vega10_set_default_registry_data()
136 hwmgr->feature_mask & PP_CLOCK_STRETCH_MASK ? true : false; in vega10_set_default_registry_data()
139 hwmgr->feature_mask & PP_ULV_MASK ? true : false; in vega10_set_default_registry_data()
142 hwmgr->feature_mask & PP_SCLK_DEEP_SLEEP_MASK ? true : false; in vega10_set_default_registry_data()
151 hwmgr->feature_mask & PP_AVFS_MASK ? true : false; in vega10_set_default_registry_data()
[all …]
Dvega20_hwmgr.c104 if (!(hwmgr->feature_mask & PP_PCIE_DPM_MASK)) in vega20_set_default_registry_data()
107 if (!(hwmgr->feature_mask & PP_SCLK_DPM_MASK)) in vega20_set_default_registry_data()
110 if (!(hwmgr->feature_mask & PP_SOCCLK_DPM_MASK)) in vega20_set_default_registry_data()
113 if (!(hwmgr->feature_mask & PP_MCLK_DPM_MASK)) in vega20_set_default_registry_data()
116 if (!(hwmgr->feature_mask & PP_DCEFCLK_DPM_MASK)) in vega20_set_default_registry_data()
119 if (!(hwmgr->feature_mask & PP_ULV_MASK)) in vega20_set_default_registry_data()
122 if (!(hwmgr->feature_mask & PP_SCLK_DEEP_SLEEP_MASK)) in vega20_set_default_registry_data()
1780 static int vega20_upload_dpm_min_level(struct pp_hwmgr *hwmgr, uint32_t feature_mask) in vega20_upload_dpm_min_level() argument
1788 (feature_mask & FEATURE_DPM_GFXCLK_MASK)) { in vega20_upload_dpm_min_level()
1799 (feature_mask & FEATURE_DPM_UCLK_MASK)) { in vega20_upload_dpm_min_level()
[all …]
Dsmu7_clockpowergating.c175 if (!(hwmgr->feature_mask & PP_ENABLE_GFX_CG_THRU_SMU)) in smu7_update_clock_gatings()
/Linux-v5.10/arch/arm64/kernel/
Dalternative.c136 unsigned long *feature_mask) in __apply_alternatives() argument
146 if (!test_bit(alt->cpufeature, feature_mask)) in __apply_alternatives()
189 feature_mask, ARM64_NCAPS); in __apply_alternatives()
/Linux-v5.10/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dnavi10_ppt.c256 uint32_t *feature_mask, uint32_t num) in navi10_get_allowed_feature_mask() argument
263 memset(feature_mask, 0, sizeof(uint32_t) * num); in navi10_get_allowed_feature_mask()
265 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) in navi10_get_allowed_feature_mask()
287 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); in navi10_get_allowed_feature_mask()
290 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_LINK_BIT); in navi10_get_allowed_feature_mask()
293 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT); in navi10_get_allowed_feature_mask()
296 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_ULV_BIT); in navi10_get_allowed_feature_mask()
299 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DS_GFXCLK_BIT); in navi10_get_allowed_feature_mask()
302 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFXOFF_BIT); in navi10_get_allowed_feature_mask()
305 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MMHUB_PG_BIT); in navi10_get_allowed_feature_mask()
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Dsienna_cichlid_ppt.c226 uint32_t *feature_mask, uint32_t num) in sienna_cichlid_get_allowed_feature_mask() argument
233 memset(feature_mask, 0, sizeof(uint32_t) * num); in sienna_cichlid_get_allowed_feature_mask()
235 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) in sienna_cichlid_get_allowed_feature_mask()
257 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); in sienna_cichlid_get_allowed_feature_mask()
258 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFX_GPO_BIT); in sienna_cichlid_get_allowed_feature_mask()
262 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT) in sienna_cichlid_get_allowed_feature_mask()
267 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_LINK_BIT); in sienna_cichlid_get_allowed_feature_mask()
270 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT); in sienna_cichlid_get_allowed_feature_mask()
273 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT); in sienna_cichlid_get_allowed_feature_mask()
276 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_ULV_BIT); in sienna_cichlid_get_allowed_feature_mask()
[all …]
Darcturus_ppt.c289 uint32_t *feature_mask, uint32_t num) in arcturus_get_allowed_feature_mask() argument
295 memset(feature_mask, 0xFF, sizeof(uint32_t) * num); in arcturus_get_allowed_feature_mask()
832 uint32_t feature_mask, in arcturus_upload_dpm_level() argument
841 (feature_mask & FEATURE_DPM_GFXCLK_MASK)) { in arcturus_upload_dpm_level()
855 (feature_mask & FEATURE_DPM_UCLK_MASK)) { in arcturus_upload_dpm_level()
869 (feature_mask & FEATURE_DPM_SOCCLK_MASK)) { in arcturus_upload_dpm_level()
1838 uint32_t feature_mask[2]; in arcturus_is_dpm_running() local
1841 ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2); in arcturus_is_dpm_running()
1845 feature_enabled = (uint64_t)feature_mask[1] << 32 | feature_mask[0]; in arcturus_is_dpm_running()
2194 uint32_t feature_mask; member
[all …]
Dsmu_v11_0.c717 uint32_t feature_mask[2]; in smu_v11_0_set_allowed_mask() local
722 bitmap_copy((unsigned long *)feature_mask, feature->allowed, 64); in smu_v11_0_set_allowed_mask()
725 feature_mask[1], NULL); in smu_v11_0_set_allowed_mask()
730 feature_mask[0], NULL); in smu_v11_0_set_allowed_mask()
742 uint32_t feature_mask[2]; in smu_v11_0_system_features_control() local
754 ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2); in smu_v11_0_system_features_control()
758 bitmap_copy(feature->enabled, (unsigned long *)&feature_mask, in smu_v11_0_system_features_control()
760 bitmap_copy(feature->supported, (unsigned long *)&feature_mask, in smu_v11_0_system_features_control()
/Linux-v5.10/drivers/mfd/
Dkempld-core.c67 pld->feature_mask = kempld_read16(pld, KEMPLD_FEATURE); in kempld_get_info_generic()
69 pld->feature_mask = 0; in kempld_get_info_generic()
97 if (pld->feature_mask & KEMPLD_FEATURE_BIT_I2C) in kempld_register_cells_generic()
100 if (pld->feature_mask & KEMPLD_FEATURE_BIT_WATCHDOG) in kempld_register_cells_generic()
103 if (pld->feature_mask & KEMPLD_FEATURE_BIT_GPIO) in kempld_register_cells_generic()
106 if (pld->feature_mask & KEMPLD_FEATURE_MASK_UART) in kempld_register_cells_generic()
/Linux-v5.10/arch/x86/mm/
Dmem_encrypt_identity.c491 unsigned long feature_mask; in sme_enable() local
513 feature_mask = (ecx & BIT(31)) ? AMD_SEV_BIT : AMD_SME_BIT; in sme_enable()
526 if (!(eax & feature_mask)) in sme_enable()
532 if (feature_mask == AMD_SME_BIT) { in sme_enable()
/Linux-v5.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dvega10_smumgr.h46 bool enable, uint32_t feature_mask);
Dvega12_smumgr.h52 bool enable, uint64_t feature_mask);
Dvega20_smumgr.h51 bool enable, uint64_t feature_mask);
Dvega12_smumgr.c127 bool enable, uint64_t feature_mask) in vega12_enable_smc_features() argument
131 smu_features_low = (uint32_t)((feature_mask & SMU_FEATURES_LOW_MASK) >> SMU_FEATURES_LOW_SHIFT); in vega12_enable_smc_features()
132 smu_features_high = (uint32_t)((feature_mask & SMU_FEATURES_HIGH_MASK) >> SMU_FEATURES_HIGH_SHIFT); in vega12_enable_smc_features()
Dvega20_smumgr.c320 bool enable, uint64_t feature_mask) in vega20_enable_smc_features() argument
325 smu_features_low = (uint32_t)((feature_mask & SMU_FEATURES_LOW_MASK) >> SMU_FEATURES_LOW_SHIFT); in vega20_enable_smc_features()
326 smu_features_high = (uint32_t)((feature_mask & SMU_FEATURES_HIGH_MASK) >> SMU_FEATURES_HIGH_SHIFT); in vega20_enable_smc_features()
Dvega10_smumgr.c113 bool enable, uint32_t feature_mask) in vega10_enable_smc_features() argument
127 msg, feature_mask, NULL); in vega10_enable_smc_features()
/Linux-v5.10/drivers/net/
Dtap.c927 netdev_features_t feature_mask = 0; in set_offload() local
936 feature_mask = NETIF_F_HW_CSUM; in set_offload()
940 feature_mask |= NETIF_F_TSO_ECN; in set_offload()
942 feature_mask |= NETIF_F_TSO; in set_offload()
944 feature_mask |= NETIF_F_TSO6; in set_offload()
956 if (feature_mask & (NETIF_F_TSO | NETIF_F_TSO6)) in set_offload()
964 tap->tap_features = feature_mask; in set_offload()
/Linux-v5.10/include/linux/mfd/
Dkempld.h91 u32 feature_mask; member
/Linux-v5.10/arch/ia64/kernel/
Dsal.c154 sal_platform_features = pf->feature_mask; in sal_desc_platform_feature()
/Linux-v5.10/drivers/gpu/drm/amd/pm/inc/
Damdgpu_smu.h466 int (*get_allowed_feature_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
546 int (*get_enabled_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
/Linux-v5.10/sound/soc/intel/skylake/
Dskl-sst-utils.c71 u32 feature_mask; member

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