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Searched refs:ext_misc_reg (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.10/drivers/clk/tegra/
Dclk-tegra210.c691 u32 boot_val = readl_relaxed(base + params->ext_misc_reg[misc_num]); in _pll_misc_chk_default()
745 clk_base + pllcx->params->ext_misc_reg[0]); in tegra210_pllcx_set_defaults()
747 clk_base + pllcx->params->ext_misc_reg[1]); in tegra210_pllcx_set_defaults()
749 clk_base + pllcx->params->ext_misc_reg[2]); in tegra210_pllcx_set_defaults()
751 clk_base + pllcx->params->ext_misc_reg[3]); in tegra210_pllcx_set_defaults()
809 val = readl_relaxed(clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
812 writel_relaxed(val, clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
822 clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
824 clk_base + plla->params->ext_misc_reg[2]); in tegra210_plla_set_defaults()
862 val = readl_relaxed(clk_base + plld->params->ext_misc_reg[0]); in tegra210_plld_set_defaults()
[all …]
Dclk-tegra124.c284 .ext_misc_reg[0] = 0x4f0,
285 .ext_misc_reg[1] = 0x4f4,
286 .ext_misc_reg[2] = 0x4f8,
306 .ext_misc_reg[0] = 0x504,
307 .ext_misc_reg[1] = 0x508,
308 .ext_misc_reg[2] = 0x50c,
366 .ext_misc_reg[0] = 0x5ac,
367 .ext_misc_reg[1] = 0x5b0,
368 .ext_misc_reg[2] = 0x5b4,
663 .ext_misc_reg[0] = 0x570,
[all …]
Dclk-tegra114.c243 .ext_misc_reg[0] = 0x4f0,
244 .ext_misc_reg[1] = 0x4f4,
245 .ext_misc_reg[2] = 0x4f8,
265 .ext_misc_reg[0] = 0x504,
266 .ext_misc_reg[1] = 0x508,
267 .ext_misc_reg[2] = 0x50c,
Dclk-pll.c2255 pll_writel(PLLCX_MISC1_DEFAULT, pll_params->ext_misc_reg[0], pll); in tegra_clk_register_pllc()
2256 pll_writel(PLLCX_MISC2_DEFAULT, pll_params->ext_misc_reg[1], pll); in tegra_clk_register_pllc()
2257 pll_writel(PLLCX_MISC3_DEFAULT, pll_params->ext_misc_reg[2], pll); in tegra_clk_register_pllc()
2378 pll_writel(PLLSS_CFG_DEFAULT, pll_params->ext_misc_reg[0], pll); in tegra_clk_register_pllss()
2379 pll_writel(PLLSS_CTRL1_DEFAULT, pll_params->ext_misc_reg[1], pll); in tegra_clk_register_pllss()
2380 pll_writel(PLLSS_CTRL1_DEFAULT, pll_params->ext_misc_reg[2], pll); in tegra_clk_register_pllss()
Dclk.h325 u32 ext_misc_reg[MAX_PLL_MISC_REG_COUNT]; member