Home
last modified time | relevance | path

Searched refs:divn_shift (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.10/drivers/clk/tegra/
Dclk-tegra124.c146 .divn_shift = 8,
242 .divn_shift = 8,
316 .divn_shift = 8,
405 .divn_shift = 8,
464 .divn_shift = 8,
503 .divn_shift = 8,
531 .divn_shift = 8,
596 .divn_shift = 8,
713 .divn_shift = 8,
Dclk-tegra114.c142 .divn_shift = 8,
204 .divn_shift = 8,
276 .divn_shift = 8,
324 .divn_shift = 8,
450 .divn_shift = 8,
548 .divn_shift = 8,
577 .divn_shift = 8,
Dclk-tegra210.c1354 #define divn_shift(p) ((p)->params->div_nmp->divn_shift) macro
1358 #define divn_mask_shifted(p) (divn_mask(p) << divn_shift(p))
1384 ndiv_new_mask = (divn_mask(pllx) >> pllx->params->div_nmp->divn_shift) in tegra210_pllx_dyn_ramp()
1403 base |= cfg->n << pllx->params->div_nmp->divn_shift; in tegra210_pllx_dyn_ramp()
1518 .divn_shift = 8,
1640 .divn_shift = 10,
1686 .divn_shift = 10,
1755 .divn_shift = 8,
1833 .divn_shift = 8,
1907 .divn_shift = 8,
[all …]
Dclk-pll.c253 #define divn_shift(p) (p)->params->div_nmp->divn_shift macro
257 #define divn_mask_shifted(p) (divn_mask(p) << divn_shift(p))
268 .divn_shift = PLL_BASE_DIVN_SHIFT,
680 (cfg->n << divn_shift(pll)) | in _update_pll_mnp()
711 cfg->n = (val >> div_nmp->divn_shift) & divn_mask(pll); in _get_pll_mnp()
988 val |= sel.n << divn_shift(pll); in clk_plle_enable()
1022 divn = (val >> pll->params->div_nmp->divn_shift) & (divn_mask(pll)); in clk_plle_recalc_rate()
1650 val |= sel.n << divn_shift(pll); in clk_plle_tegra114_enable()
1941 .divn_shift = PLLE_BASE_DIVN_SHIFT,
2135 val |= (pll_params->vco_min / parent_rate) << divn_shift(pll); in tegra_clk_register_pllre()
[all …]
Dclk.h199 u8 divn_shift; member
Dclk-tegra30.c368 .divn_shift = 8,