| /Linux-v5.10/drivers/gpu/drm/amd/amdkfd/ |
| D | kfd_mqd_manager.c | 100 struct kfd_cu_info cu_info; in mqd_symmetrically_map_cu_mask() local
104 amdgpu_amdkfd_get_cu_info(mm->dev->kgd, &cu_info); in mqd_symmetrically_map_cu_mask()
106 if (cu_mask_count > cu_info.cu_active_number) in mqd_symmetrically_map_cu_mask()
107 cu_mask_count = cu_info.cu_active_number; in mqd_symmetrically_map_cu_mask()
109 for (se = 0; se < cu_info.num_shader_engines; se++) in mqd_symmetrically_map_cu_mask()
110 for (sh = 0; sh < cu_info.num_shader_arrays_per_engine; sh++) in mqd_symmetrically_map_cu_mask()
111 cu_per_se[se] += hweight32(cu_info.cu_bitmap[se % 4][sh + (se / 4)]); in mqd_symmetrically_map_cu_mask()
127 if (se == cu_info.num_shader_engines) { in mqd_symmetrically_map_cu_mask()
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| D | kfd_crat.c | 547 struct kfd_cu_info *cu_info, in fill_in_pcache() argument
613 struct kfd_cu_info *cu_info, in kfd_fill_gpu_cache_info() argument
705 for (i = 0; i < cu_info->num_shader_engines; i++) { in kfd_fill_gpu_cache_info()
706 for (j = 0; j < cu_info->num_shader_arrays_per_engine; in kfd_fill_gpu_cache_info()
708 for (k = 0; k < cu_info->num_cu_per_sh; in kfd_fill_gpu_cache_info()
713 cu_info, in kfd_fill_gpu_cache_info()
715 cu_info->cu_bitmap[i % 4][j + i / 4], in kfd_fill_gpu_cache_info()
1171 struct kfd_cu_info cu_info; in kfd_create_vcrat_image_gpu() local
1217 amdgpu_amdkfd_get_cu_info(kdev->kgd, &cu_info); in kfd_create_vcrat_image_gpu()
1218 cu->num_simd_per_cu = cu_info.simd_per_cu; in kfd_create_vcrat_image_gpu()
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| D | kfd_topology.c | 1236 struct kfd_cu_info cu_info; in kfd_topology_add_device() local
1310 amdgpu_amdkfd_get_cu_info(dev->gpu->kgd, &cu_info); in kfd_topology_add_device()
1316 cu_info.num_shader_arrays_per_engine; in kfd_topology_add_device()
1403 cu_info.simd_per_cu * cu_info.cu_active_number; in kfd_topology_add_device()
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| /Linux-v5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_amdkfd.c | 446 void amdgpu_amdkfd_get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info) in amdgpu_amdkfd_get_cu_info() argument
449 struct amdgpu_cu_info acu_info = adev->gfx.cu_info; in amdgpu_amdkfd_get_cu_info()
451 memset(cu_info, 0, sizeof(*cu_info)); in amdgpu_amdkfd_get_cu_info()
452 if (sizeof(cu_info->cu_bitmap) != sizeof(acu_info.bitmap)) in amdgpu_amdkfd_get_cu_info()
455 cu_info->cu_active_number = acu_info.number; in amdgpu_amdkfd_get_cu_info()
456 cu_info->cu_ao_mask = acu_info.ao_cu_mask; in amdgpu_amdkfd_get_cu_info()
457 memcpy(&cu_info->cu_bitmap[0], &acu_info.bitmap[0], in amdgpu_amdkfd_get_cu_info()
459 cu_info->num_shader_engines = adev->gfx.config.max_shader_engines; in amdgpu_amdkfd_get_cu_info()
460 cu_info->num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se; in amdgpu_amdkfd_get_cu_info()
461 cu_info->num_cu_per_sh = adev->gfx.config.max_cu_per_sh; in amdgpu_amdkfd_get_cu_info()
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| D | amdgpu_discovery.c | 400 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gc_info->gc_wave_size); in amdgpu_discovery_get_gfx_info()
401 adev->gfx.cu_info.max_waves_per_simd = le32_to_cpu(gc_info->gc_max_waves_per_simd); in amdgpu_discovery_get_gfx_info()
402 adev->gfx.cu_info.max_scratch_slots_per_cu = le32_to_cpu(gc_info->gc_max_scratch_slots_per_cu); in amdgpu_discovery_get_gfx_info()
403 adev->gfx.cu_info.lds_size = le32_to_cpu(gc_info->gc_lds_size); in amdgpu_discovery_get_gfx_info()
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| D | amdgpu_atomfirmware.c | 489 adev->gfx.cu_info.wave_front_size = le16_to_cpu(gfx_info->v24.gc_wave_size); in amdgpu_atomfirmware_get_gfx_info()
490 adev->gfx.cu_info.max_waves_per_simd = le16_to_cpu(gfx_info->v24.gc_max_waves_per_simd); in amdgpu_atomfirmware_get_gfx_info()
491 adev->gfx.cu_info.max_scratch_slots_per_cu = gfx_info->v24.gc_max_scratch_slots_per_cu; in amdgpu_atomfirmware_get_gfx_info()
492 adev->gfx.cu_info.lds_size = le16_to_cpu(gfx_info->v24.gc_lds_size); in amdgpu_atomfirmware_get_gfx_info()
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| D | amdgpu_kms.c | 772 dev_info.cu_active_number = adev->gfx.cu_info.number; in amdgpu_info_ioctl()
773 dev_info.cu_ao_mask = adev->gfx.cu_info.ao_cu_mask; in amdgpu_info_ioctl()
775 memcpy(&dev_info.cu_ao_bitmap[0], &adev->gfx.cu_info.ao_cu_bitmap[0], in amdgpu_info_ioctl()
776 sizeof(adev->gfx.cu_info.ao_cu_bitmap)); in amdgpu_info_ioctl()
777 memcpy(&dev_info.cu_bitmap[0], &adev->gfx.cu_info.bitmap[0], in amdgpu_info_ioctl()
778 sizeof(adev->gfx.cu_info.bitmap)); in amdgpu_info_ioctl()
784 dev_info.wave_front_size = adev->gfx.cu_info.wave_front_size; in amdgpu_info_ioctl()
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| D | gfx_v7_0.c | 3849 WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask); in gfx_v7_0_init_ao_cu_mask()
3853 tmp |= (adev->gfx.cu_info.number << RLC_MAX_PG_CU__MAX_POWERED_UP_CU__SHIFT); in gfx_v7_0_init_ao_cu_mask()
5158 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v7_0_get_cu_info() local
5167 memset(cu_info, 0, sizeof(*cu_info)); in gfx_v7_0_get_cu_info()
5182 cu_info->bitmap[i][j] = bitmap; in gfx_v7_0_get_cu_info()
5195 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v7_0_get_cu_info()
5201 cu_info->number = active_cu_number; in gfx_v7_0_get_cu_info()
5202 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v7_0_get_cu_info()
5203 cu_info->simd_per_cu = NUM_SIMD_PER_CU; in gfx_v7_0_get_cu_info()
5204 cu_info->max_waves_per_simd = 10; in gfx_v7_0_get_cu_info()
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| D | gfx_v6_0.c | 2783 WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask); in gfx_v6_0_init_ao_cu_mask()
2787 tmp |= (adev->gfx.cu_info.number << RLC_MAX_PG_CU__MAX_POWERED_UP_CU__SHIFT); in gfx_v6_0_init_ao_cu_mask()
3591 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v6_0_get_cu_info() local
3600 memset(cu_info, 0, sizeof(*cu_info)); in gfx_v6_0_get_cu_info()
3615 cu_info->bitmap[i][j] = bitmap; in gfx_v6_0_get_cu_info()
3628 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v6_0_get_cu_info()
3635 cu_info->number = active_cu_number; in gfx_v6_0_get_cu_info()
3636 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v6_0_get_cu_info()
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| D | amdgpu_amdkfd.h | 172 void amdgpu_amdkfd_get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info);
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| D | amdgpu_amdkfd_gfx_v9.c | 876 *max_waves_per_cu = adev->gfx.cu_info.simd_per_cu * in kgd_gfx_v9_get_cu_occupancy()
877 adev->gfx.cu_info.max_waves_per_simd; in kgd_gfx_v9_get_cu_occupancy()
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| D | amdgpu_gfx.h | 305 struct amdgpu_cu_info cu_info; member
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| D | gfx_v8_0.c | 4071 WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask); in gfx_v8_0_init_pg()
7062 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v8_0_get_cu_info() local
7066 memset(cu_info, 0, sizeof(*cu_info)); in gfx_v8_0_get_cu_info()
7086 cu_info->bitmap[i][j] = bitmap; in gfx_v8_0_get_cu_info()
7099 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v8_0_get_cu_info()
7105 cu_info->number = active_cu_number; in gfx_v8_0_get_cu_info()
7106 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v8_0_get_cu_info()
7107 cu_info->simd_per_cu = NUM_SIMD_PER_CU; in gfx_v8_0_get_cu_info()
7108 cu_info->max_waves_per_simd = 10; in gfx_v8_0_get_cu_info()
7109 cu_info->max_scratch_slots_per_cu = 32; in gfx_v8_0_get_cu_info()
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| D | gfx_v9_0.c | 797 struct amdgpu_cu_info *cu_info);
1738 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v9_0_init_always_on_cu_mask() local
1760 if (cu_info->bitmap[i][j] & mask) { in gfx_v9_0_init_always_on_cu_mask()
1773 cu_info->ao_cu_bitmap[i][j] = cu_bitmap; in gfx_v9_0_init_always_on_cu_mask()
2556 gfx_v9_0_get_cu_info(adev, &adev->gfx.cu_info); in gfx_v9_0_constants_init()
6938 struct amdgpu_cu_info *cu_info) in gfx_v9_0_get_cu_info() argument
6944 if (!adev || !cu_info) in gfx_v9_0_get_cu_info()
6981 cu_info->bitmap[i % 4][j + i / 4] = bitmap; in gfx_v9_0_get_cu_info()
6994 cu_info->ao_cu_bitmap[i % 4][j + i / 4] = ao_bitmap; in gfx_v9_0_get_cu_info()
7000 cu_info->number = active_cu_number; in gfx_v9_0_get_cu_info()
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| D | amdgpu_device.c | 1869 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gpu_info_fw->gc_wave_size); in amdgpu_device_parse_gpu_info_fw()
1870 adev->gfx.cu_info.max_waves_per_simd = in amdgpu_device_parse_gpu_info_fw()
1872 adev->gfx.cu_info.max_scratch_slots_per_cu = in amdgpu_device_parse_gpu_info_fw()
1874 adev->gfx.cu_info.lds_size = le32_to_cpu(gpu_info_fw->gc_lds_size); in amdgpu_device_parse_gpu_info_fw()
3447 adev->gfx.cu_info.number); in amdgpu_device_init()
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| D | gfx_v10_0.c | 3201 struct amdgpu_cu_info *cu_info);
4797 gfx_v10_0_get_cu_info(adev, &adev->gfx.cu_info); in gfx_v10_0_constants_init()
8812 struct amdgpu_cu_info *cu_info) in gfx_v10_0_get_cu_info() argument
8818 if (!adev || !cu_info) in gfx_v10_0_get_cu_info()
8838 cu_info->bitmap[i][j] = bitmap; in gfx_v10_0_get_cu_info()
8851 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v10_0_get_cu_info()
8857 cu_info->number = active_cu_number; in gfx_v10_0_get_cu_info()
8858 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v10_0_get_cu_info()
8859 cu_info->simd_per_cu = NUM_SIMD_PER_CU; in gfx_v10_0_get_cu_info()
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| /Linux-v5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | smu7_clockpowergating.c | 431 adev->gfx.cu_info.number, in smu7_powergate_gfx()
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| D | vega12_hwmgr.c | 430 data->total_active_cus = adev->gfx.cu_info.number; in vega12_hwmgr_backend_init()
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| D | vega20_hwmgr.c | 472 data->total_active_cus = adev->gfx.cu_info.number; in vega20_hwmgr_backend_init()
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| D | vega10_hwmgr.c | 913 data->total_active_cus = adev->gfx.cu_info.number; in vega10_hwmgr_backend_init()
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| /Linux-v5.10/drivers/net/ethernet/mellanox/mlxsw/ |
| D | spectrum.c | 4231 struct netdev_notifier_changeupper_info *cu_info; in mlxsw_sp_netdevice_vxlan_event() local
4240 cu_info = container_of(info, in mlxsw_sp_netdevice_vxlan_event()
4243 upper_dev = cu_info->upper_dev; in mlxsw_sp_netdevice_vxlan_event()
4250 if (cu_info->linking) { in mlxsw_sp_netdevice_vxlan_event()
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| /Linux-v5.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| D | vegam_smumgr.c | 1913 adev->gfx.cu_info.number, in vegam_enable_reconfig_cus()
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