Searched refs:clkc_readl (Results 1 – 2 of 2) sorted by relevance
59 static inline unsigned long clkc_readl(unsigned reg) in clkc_readl() function81 if (clkc_readl(regcfg2) & BIT(2)) { in pll_clk_recalc_rate()86 u32 cfg0 = clkc_readl(clk->regofs); in pll_clk_recalc_rate()156 while (!(clkc_readl(reg) & BIT(6))) in pll_clk_set_rate()299 u32 cfg = clkc_readl(clk->regofs); in dmn_clk_get_parent()314 u32 cfg = clkc_readl(clk->regofs); in dmn_clk_set_parent()324 while (clkc_readl(clk->regofs) & BIT(3)) in dmn_clk_set_parent()337 u32 cfg = clkc_readl(clk->regofs); in dmn_clk_recalc_rate()395 reg = clkc_readl(clk->regofs); in dmn_clk_set_rate()401 while (clkc_readl(clk->regofs) & BIT(25)) in dmn_clk_set_rate()[all …]
336 static inline unsigned long clkc_readl(unsigned reg) in clkc_readl() function358 u32 regctrl0 = clkc_readl(clk->regofs + SIRFSOC_CLKC_MEMPLL_AB_CTRL0 - in pll_clk_recalc_rate()360 u32 regfreq = clkc_readl(clk->regofs); in pll_clk_recalc_rate()361 u32 regssc = clkc_readl(clk->regofs + SIRFSOC_CLKC_MEMPLL_AB_SSC - in pll_clk_recalc_rate()493 return !!(clkc_readl(reg) & BIT(0)); in dto_clk_is_enabled()503 val = clkc_readl(reg) | BIT(0); in dto_clk_enable()515 val = clkc_readl(reg) & ~BIT(0); in dto_clk_disable()524 u32 finc = clkc_readl(clk->inc_offset); in dto_clk_recalc_rate()525 …u32 droff = clkc_readl(clk->src_offset + SIRFSOC_CLKC_AUDIO_DTO_DROFF - SIRFSOC_CLKC_AUDIO_DTO_SRC… in dto_clk_recalc_rate()566 return clkc_readl(clk->src_offset); in dto_clk_get_parent()[all …]
