59 static inline unsigned long clkc_readl(unsigned reg)  in clkc_readl()  function
81 	if (clkc_readl(regcfg2) & BIT(2)) {  in pll_clk_recalc_rate()
86 		u32 cfg0 = clkc_readl(clk->regofs);  in pll_clk_recalc_rate()
156 	while (!(clkc_readl(reg) & BIT(6)))  in pll_clk_set_rate()
299 	u32 cfg = clkc_readl(clk->regofs);  in dmn_clk_get_parent()
314 	u32 cfg = clkc_readl(clk->regofs);  in dmn_clk_set_parent()
324 	while (clkc_readl(clk->regofs) & BIT(3))  in dmn_clk_set_parent()
337 	u32 cfg = clkc_readl(clk->regofs);  in dmn_clk_recalc_rate()
395 	reg = clkc_readl(clk->regofs);  in dmn_clk_set_rate()
401 	while (clkc_readl(clk->regofs) & BIT(25))  in dmn_clk_set_rate()
645 	return !!(clkc_readl(reg) & BIT(bit));  in std_clk_is_enabled()
660 	val = clkc_readl(reg) | BIT(bit);  in std_clk_enable()
677 	val = clkc_readl(reg) & ~BIT(bit);  in std_clk_disable()