Searched refs:QSPI (Results 1 – 25 of 25) sorted by relevance
153 label = "QSPI.SPL";157 label = "QSPI.SPL.backup1";161 label = "QSPI.SPL.backup2";165 label = "QSPI.SPL.backup3";169 label = "QSPI.u-boot";173 label = "QSPI.u-boot-spl-os";177 label = "QSPI.u-boot-env";181 label = "QSPI.u-boot-env.backup1";185 label = "QSPI.kernel";189 label = "QSPI.file-system";
492 label = "QSPI.SPL";496 label = "QSPI.SPL.backup1";500 label = "QSPI.SPL.backup2";504 label = "QSPI.SPL.backup3";508 label = "QSPI.u-boot";512 label = "QSPI.u-boot-spl-os";516 label = "QSPI.u-boot-env";520 label = "QSPI.u-boot-env.backup1";524 label = "QSPI.kernel";528 label = "QSPI.file-system";
343 label = "QSPI.u-boot";347 label = "QSPI.u-boot-env";351 label = "QSPI.skern";355 label = "QSPI.pmmc-firmware";359 label = "QSPI.kernel";363 label = "QSPI.u-boot-spl-os";367 label = "QSPI.file-system";
544 label = "QSPI.SPL";548 label = "QSPI.u-boot";552 label = "QSPI.u-boot-spl-os";556 label = "QSPI.u-boot-env";560 label = "QSPI.u-boot-env.backup1";564 label = "QSPI.kernel";568 label = "QSPI.file-system";
456 label = "QSPI.U_BOOT";460 label = "QSPI.U_BOOT.backup";464 label = "QSPI.U-BOOT-SPL_OS";468 label = "QSPI.U_BOOT_ENV";472 label = "QSPI.U-BOOT-ENV.backup";476 label = "QSPI.KERNEL";480 label = "QSPI.FILESYSTEM";
342 label = "QSPI.u-boot-spl-os";346 label = "QSPI.u-boot-env";350 label = "QSPI.skern";354 label = "QSPI.pmmc-firmware";358 label = "QSPI.kernel";362 label = "QSPI.file-system";
750 status = "okay"; /* Disable QSPI when enabling GPMC (NAND) */899 status = "disabled"; /* Disable GPMC (NAND) when enabling QSPI */921 label = "QSPI.U_BOOT";925 label = "QSPI.U_BOOT.backup";929 label = "QSPI.U-BOOT-SPL_OS";933 label = "QSPI.U_BOOT_ENV";937 label = "QSPI.U-BOOT-ENV.backup";941 label = "QSPI.KERNEL";945 label = "QSPI.FILESYSTEM";
765 label = "QSPI.U_BOOT";769 label = "QSPI.U_BOOT.backup";773 label = "QSPI.U-BOOT-SPL_OS";777 label = "QSPI.U_BOOT_ENV";781 label = "QSPI.U-BOOT-ENV.backup";785 label = "QSPI.KERNEL";789 label = "QSPI.FILESYSTEM";
39 /* GP0_18 set low to select QSPI. Doing so will disable VIN2 */
320 status = "disabled"; /* Conflict with QSPI. */
1 TI QSPI controller.5 - reg: Should contain QSPI registers location and length.12 - ti,hwmods: Name of the hwmod associated to the QSPI19 - syscon-chipselects: Handle to system control region contains QSPI22 NOTE: TI QSPI controller requires different pinmux and IODelay26 specified in the slave nodes of TI QSPI controller without appropriate
1 Xilinx Zynq QSPI controller Device Tree Bindings6 - reg : Physical base address and size of QSPI registers map.
1 * Atmel Quad Serial Peripheral Interface (QSPI)13 - clocks: Should reference the peripheral clock and the QSPI system
11 address and length of the QSPI Controller data area.20 - cdns,rclk-en : Flag to indicate that QSPI return clock is used to latch21 the read data rather than the QSPI clock. Make sure that QSPI return
14 - Dual mode QSPI
338 QSPI, enumerator430 INTC_VECT(QSPI, 0xE60),438 INTC_GROUP(SPI, HSPI, RSPI, QSPI),
210 Cadence QSPI is a specialized controller for connecting an SPI212 device with a Cadence QSPI controller and want to access the223 tristate "Freescale Coldfire QSPI controller"226 This enables support for the Coldfire QSPI controller in master332 tristate "Freescale QSPI controller"569 tristate "DRA7xxx QSPI controller support"572 QSPI master controller for DRA7xxx used for flash devices.656 tristate "Renesas RSPI/QSPI controller"659 SPI driver for Renesas RSPI and QSPI blocks.662 tristate "QTI QSPI controller"[all …]
120 #define QSPI 107 macro
17 the services for FPGA configuration, QSPI, Crypto and warm reset. Service layer
1387 …PINGROUP(qspi_sck_pee0, QSPI, RSVD1, RSVD2, RSVD3, 0x3088, Y, Y, N, 0x…1388 …PINGROUP(qspi_cs_n_pee1, QSPI, RSVD1, RSVD2, RSVD3, 0x308c, Y, Y, N, -1…1389 …PINGROUP(qspi_io0_pee2, QSPI, RSVD1, RSVD2, RSVD3, 0x3090, Y, Y, N, -1…1390 …PINGROUP(qspi_io1_pee3, QSPI, RSVD1, RSVD2, RSVD3, 0x3094, Y, Y, N, -1…1391 …PINGROUP(qspi_io2_pee4, QSPI, RSVD1, RSVD2, RSVD3, 0x3098, Y, Y, N, -1…1392 …PINGROUP(qspi_io3_pee5, QSPI, RSVD1, RSVD2, RSVD3, 0x309c, Y, Y, N, -1…
117 QSPI FIFO ECC121 - altr,ecc-parent : phandle to parent QSPI node.
457 bool "Altera QSPI FIFO ECC"461 Altera QSPI FIFO Memory for Altera SoCs.
1898 PCLK(QSPI, "qspi", "ck_axi", CLK_IGNORE_UNUSED, G_QSPI),
