Searched refs:IMX6SLL_CLK_PLL4_AUDIO_DIV (Results 1 – 3 of 3) sorted by relevance
55 #define IMX6SLL_CLK_PLL4_AUDIO_DIV 44 macro
30 assigned-clocks = <&clks IMX6SLL_CLK_PLL4_AUDIO_DIV>;
193 hws[IMX6SLL_CLK_PLL4_AUDIO_DIV] = clk_hw_register_divider(NULL, "pll4_audio_div", "pll4_post_div", in imx6sll_clocks_init()
