Searched refs:HPRE_ADDR (Results 1 – 1 of 1) sorted by relevance
| /Linux-v5.10/drivers/crypto/hisilicon/hpre/ |
| D | hpre_main.c | 71 #define HPRE_ADDR(qm, offset) ((qm)->io_base + (offset)) macro
250 val = readl(HPRE_ADDR(qm, QM_PEH_AXUSER_CFG)); in disable_flr_of_bme()
253 writel(val, HPRE_ADDR(qm, QM_PEH_AXUSER_CFG)); in disable_flr_of_bme()
254 writel(PEH_AXUSER_CFG_ENABLE, HPRE_ADDR(qm, QM_PEH_AXUSER_CFG_ENABLE)); in disable_flr_of_bme()
264 writel(HPRE_QM_USR_CFG_MASK, HPRE_ADDR(qm, QM_ARUSER_M_CFG_ENABLE)); in hpre_set_user_domain_and_cache()
265 writel(HPRE_QM_USR_CFG_MASK, HPRE_ADDR(qm, QM_AWUSER_M_CFG_ENABLE)); in hpre_set_user_domain_and_cache()
266 writel_relaxed(HPRE_QM_AXI_CFG_MASK, HPRE_ADDR(qm, QM_AXI_M_CFG)); in hpre_set_user_domain_and_cache()
269 val = readl_relaxed(HPRE_ADDR(qm, HPRE_QM_ABNML_INT_MASK)); in hpre_set_user_domain_and_cache()
271 writel_relaxed(val, HPRE_ADDR(qm, HPRE_QM_ABNML_INT_MASK)); in hpre_set_user_domain_and_cache()
273 writel(0x1, HPRE_ADDR(qm, HPRE_TYPES_ENB)); in hpre_set_user_domain_and_cache()
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