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Searched refs:HDP (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/
Dnv.c599 WREG32_SOC15_NO_KIQ(HDP, 0, mmHDP_READ_CACHE_INVALIDATE, 1); in nv_invalidate_hdp()
602 HDP, 0, mmHDP_READ_CACHE_INVALIDATE), 1); in nv_invalidate_hdp()
946 hdp_clk_cntl = hdp_clk_cntl1 = RREG32_SOC15(HDP, 0, mmHDP_CLK_CNTL); in nv_update_hdp_mem_power_gating()
947 hdp_mem_pwr_cntl = RREG32_SOC15(HDP, 0, mmHDP_MEM_POWER_CTRL); in nv_update_hdp_mem_power_gating()
955 WREG32_SOC15(HDP, 0, mmHDP_CLK_CNTL, hdp_clk_cntl); in nv_update_hdp_mem_power_gating()
975 WREG32_SOC15(HDP, 0, mmHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl); in nv_update_hdp_mem_power_gating()
1012 WREG32_SOC15(HDP, 0, mmHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl); in nv_update_hdp_mem_power_gating()
1015 WREG32_SOC15(HDP, 0, mmHDP_CLK_CNTL, hdp_clk_cntl1); in nv_update_hdp_mem_power_gating()
1026 hdp_clk_cntl = RREG32_SOC15(HDP, 0, mmHDP_CLK_CNTL); in nv_update_hdp_clock_gating()
1046 WREG32_SOC15(HDP, 0, mmHDP_CLK_CNTL, hdp_clk_cntl); in nv_update_hdp_clock_gating()
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Dsoc15.c846 WREG32_SOC15_NO_KIQ(HDP, 0, mmHDP_READ_CACHE_INVALIDATE, 1); in soc15_invalidate_hdp()
849 HDP, 0, mmHDP_READ_CACHE_INVALIDATE), 1); in soc15_invalidate_hdp()
863 RREG32_SOC15(HDP, 0, mmHDP_EDC_CNT); in vega20_reset_hdp_ras_error_count()
1435 def = data = RREG32(SOC15_REG_OFFSET(HDP, 0, mmHDP_MEM_POWER_CTRL)); in soc15_update_hdp_light_sleep()
1449 WREG32(SOC15_REG_OFFSET(HDP, 0, mmHDP_MEM_POWER_CTRL), data); in soc15_update_hdp_light_sleep()
1451 def = data = RREG32(SOC15_REG_OFFSET(HDP, 0, mmHDP_MEM_POWER_LS)); in soc15_update_hdp_light_sleep()
1459 WREG32(SOC15_REG_OFFSET(HDP, 0, mmHDP_MEM_POWER_LS), data); in soc15_update_hdp_light_sleep()
1588 data = RREG32(SOC15_REG_OFFSET(HDP, 0, mmHDP_MEM_POWER_LS)); in soc15_common_get_clockgating_state()
Dgmc_v9_0.c1625 WREG32_FIELD15(HDP, 0, HDP_MMHUB_CNTL, HDP_MMHUB_GCC, 1); in gmc_v9_0_hw_init()
1631 WREG32_FIELD15(HDP, 0, HDP_MISC_CNTL, FLUSH_INVALIDATE_CACHE, 1); in gmc_v9_0_hw_init()
1633 tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL); in gmc_v9_0_hw_init()
1634 WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp); in gmc_v9_0_hw_init()
1636 WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8)); in gmc_v9_0_hw_init()
1637 WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40)); in gmc_v9_0_hw_init()
Dgmc_v10_0.c958 tmp = RREG32_SOC15(HDP, 0, mmHDP_MISC_CNTL); in gmc_v10_0_gart_enable()
960 WREG32_SOC15(HDP, 0, mmHDP_MISC_CNTL, tmp); in gmc_v10_0_gart_enable()
962 tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL); in gmc_v10_0_gart_enable()
963 WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp); in gmc_v10_0_gart_enable()
/Linux-v5.10/include/dt-bindings/clock/
Dstm32mp1-clks.h68 #define HDP 55 macro
/Linux-v5.10/drivers/clk/
Dclk-stm32mp1.c1845 PCLK(HDP, "hdp", "pclk3", 0, G_HDP),