Searched refs:DP_AUX_NATIVE_WRITE (Results 1 – 16 of 16) sorted by relevance
37 bool native = msg->request & (DP_AUX_NATIVE_WRITE & DP_AUX_NATIVE_READ); in edp_msg_fifo_tx()116 bool native = msg->request & (DP_AUX_NATIVE_WRITE & DP_AUX_NATIVE_READ); in edp_aux_transfer()
75 case DP_AUX_NATIVE_WRITE: in radeon_dp_aux_transfer_native()
178 case DP_AUX_NATIVE_WRITE: in radeon_dp_aux_transfer_atom()
852 case DP_AUX_NATIVE_WRITE: in ti_sn_aux_transfer()870 if (request == DP_AUX_NATIVE_WRITE || request == DP_AUX_I2C_WRITE) { in ti_sn_aux_transfer()898 if (request == DP_AUX_NATIVE_WRITE || request == DP_AUX_I2C_WRITE) in ti_sn_aux_transfer()
360 case DP_AUX_NATIVE_WRITE: in tc_aux_transfer()
345 aux->native = msg->request & (DP_AUX_NATIVE_WRITE & DP_AUX_NATIVE_READ); in dp_aux_transfer()
1132 case DP_AUX_NATIVE_WRITE: in analogix_dp_transfer()1221 else if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_NATIVE_WRITE || in analogix_dp_transfer()
146 case DP_AUX_NATIVE_WRITE: in amdgpu_atombios_dp_aux_transfer()
183 case DP_AUX_NATIVE_WRITE: in tegra_dpaux_transfer()
342 ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, in drm_dp_dpcd_write()345 drm_dp_dump_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer, ret); in drm_dp_dpcd_write()
63 payload.i2c_over_aux = (msg->request & DP_AUX_NATIVE_WRITE) == 0; in dm_dp_aux_transfer()
96 #define DP_AUX_NATIVE_WRITE 0x8 macro
822 if (msg->request != DP_AUX_NATIVE_WRITE && in cdns_mhdp_transfer()826 if (msg->request == DP_AUX_NATIVE_WRITE) { in cdns_mhdp_transfer()
367 [0] = DP_AUX_NATIVE_WRITE << 4, in hsw_psr_setup_aux()
1581 if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_NATIVE_WRITE && in intel_dp_aux_xfer_flags()1601 case DP_AUX_NATIVE_WRITE: in intel_dp_aux_transfer()
682 msg[0] = DP_AUX_NATIVE_WRITE << 4; in cdv_intel_dp_aux_native_write()
