Searched refs:DP_AUX_I2C_READ (Results 1 – 15 of 15) sorted by relevance
119 if ((msg->size > 0) && ((msg->request & DP_AUX_I2C_READ) == 0)) { in anx_dp_aux_transfer()149 if ((msg->size > 0) && (msg->request & DP_AUX_I2C_READ)) { in anx_dp_aux_transfer()
1126 case DP_AUX_I2C_READ: in analogix_dp_transfer()1155 if (!(msg->request & DP_AUX_I2C_READ)) { in analogix_dp_transfer()1203 if (msg->request & DP_AUX_I2C_READ) { in analogix_dp_transfer()1219 (msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_I2C_READ) in analogix_dp_transfer()
38 bool read = msg->request & (DP_AUX_I2C_READ & DP_AUX_NATIVE_READ); in edp_msg_fifo_tx()117 bool read = msg->request & (DP_AUX_I2C_READ & DP_AUX_NATIVE_READ); in edp_aux_transfer()
237 (DP_AUX_I2C_READ & DP_AUX_NATIVE_READ); in dp_aux_update_offset_and_segment()274 (DP_AUX_I2C_READ & DP_AUX_NATIVE_READ); in dp_aux_transfer_helper()367 aux->read = msg->request & (DP_AUX_I2C_READ & DP_AUX_NATIVE_READ); in dp_aux_transfer()
146 case DP_AUX_I2C_READ: in tegra_dpaux_transfer()167 case DP_AUX_I2C_READ: in tegra_dpaux_transfer()198 if ((msg->request & DP_AUX_I2C_READ) == 0) { in tegra_dpaux_transfer()247 if (msg->request & DP_AUX_I2C_READ) { in tegra_dpaux_transfer()
80 case DP_AUX_I2C_READ: in radeon_dp_aux_transfer_native()
204 case DP_AUX_I2C_READ: in radeon_dp_aux_transfer_atom()
1200 if ((msg->request & DP_AUX_I2C_READ) == 0) in drm_dp_aux_req_duration()1215 if (msg->request & DP_AUX_I2C_READ) in drm_dp_aux_reply_duration()1388 DP_AUX_I2C_READ : DP_AUX_I2C_WRITE; in drm_dp_i2c_msg_set_request()
164 case DP_AUX_I2C_READ: in amdgpu_atombios_dp_aux_transfer()
358 case DP_AUX_I2C_READ: in tc_aux_transfer()403 case DP_AUX_I2C_READ: in tc_aux_transfer()
855 case DP_AUX_I2C_READ: in ti_sn_aux_transfer()
64 payload.write = (msg->request & DP_AUX_I2C_READ) == 0; in dm_dp_aux_transfer()
93 #define DP_AUX_I2C_READ 0x1 macro
769 msg[0] = DP_AUX_I2C_READ << 4; in cdv_intel_dp_i2c_aux_ch()
1631 case DP_AUX_I2C_READ: in intel_dp_aux_transfer()