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Searched refs:CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/
Dnbio_v6_1.c152 data |= (CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK | in nbio_v6_1_update_medium_grain_clock_gating()
160 data &= ~(CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK | in nbio_v6_1_update_medium_grain_clock_gating()
200 if (data & CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK) in nbio_v6_1_get_clockgating_state()
Dnbio_v2_3.c213 data |= (CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK | in nbio_v2_3_update_medium_grain_clock_gating()
220 data &= ~(CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK | in nbio_v2_3_update_medium_grain_clock_gating()
259 if (data & CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK) in nbio_v2_3_get_clockgating_state()
Dnbio_v7_0.c223 if (data & CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK) in nbio_v7_0_get_clockgating_state()
Dnbio_v7_4.c229 if (data & CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK) in nbio_v7_4_get_clockgating_state()
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/bif/
Dbif_5_0_sh_mask.h3665 #define CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK 0x1 macro
/Linux-v5.10/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_7_4_sh_mask.h44505 #define CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK … macro
Dnbio_2_3_sh_mask.h56026 #define CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK … macro
Dnbio_7_0_sh_mask.h75292 #define CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK … macro
Dnbio_6_1_sh_mask.h39856 #define CPM_CONTROL__LCLK_DYN_GATE_ENABLE_MASK … macro