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Searched refs:CLK_SCLK_SPI0 (Results 1 – 17 of 17) sorted by relevance

/Linux-v5.10/include/dt-bindings/clock/
Dexynos5250.h50 #define CLK_SCLK_SPI0 154 macro
Dexynos7-clk.h41 #define CLK_SCLK_SPI0 7 macro
Dexynos4.h72 #define CLK_SCLK_SPI0 159 macro
Dexynos5420.h36 #define CLK_SCLK_SPI0 135 macro
Dexynos3250.h253 #define CLK_SCLK_SPI0 245 macro
Dexynos5433.h434 #define CLK_SCLK_SPI0 33 macro
/Linux-v5.10/drivers/clk/samsung/
Dclk-exynos5250.c508 GATE(CLK_SCLK_SPI0, "sclk_spi0", "div_spi_pre0",
Dclk-exynos3250.c560 GATE(CLK_SCLK_SPI0, "sclk_spi0", "div_spi0_pre",
Dclk-exynos7.c352 GATE(CLK_SCLK_SPI0, "sclk_spi0", "dout_sclk_spi0",
Dclk-exynos4.c789 GATE(CLK_SCLK_SPI0, "sclk_spi0", "div_spi_pre0", SRC_MASK_PERIL1, 16,
Dclk-exynos5420.c987 GATE(CLK_SCLK_SPI0, "sclk_spi0", "dout_spi0_pre",
Dclk-exynos5433.c1715 GATE(CLK_SCLK_SPI0, "sclk_spi0", "sclk_spi0_peric", ENABLE_SCLK_PERIC,
/Linux-v5.10/arch/arm/boot/dts/
Dexynos3250.dtsi645 clocks = <&cmu CLK_SPI0>, <&cmu CLK_SCLK_SPI0>;
Dexynos4.dtsi621 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
Dexynos5250.dtsi494 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
Dexynos5420.dtsi564 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
/Linux-v5.10/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi1355 <&cmu_peric CLK_SCLK_SPI0>,