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Searched refs:CLKID_FCLK_DIV3 (Results 1 – 17 of 17) sorted by relevance

/Linux-v5.10/include/dt-bindings/clock/
Daxg-clkc.h14 #define CLKID_FCLK_DIV3 3 macro
Dmeson8b-clkc.h15 #define CLKID_FCLK_DIV3 6 macro
Dg12a-clkc.h14 #define CLKID_FCLK_DIV3 3 macro
Dgxbb-clkc.h13 #define CLKID_FCLK_DIV3 5 macro
/Linux-v5.10/Documentation/devicetree/bindings/clock/
Damlogic,axg-audio-clkc.txt46 <&clkc CLKID_FCLK_DIV3>,
/Linux-v5.10/arch/arm64/boot/dts/amlogic/
Dmeson-g12.dtsi83 <&clkc CLKID_FCLK_DIV3>,
Dmeson-sm1.dtsi181 <&clkc CLKID_FCLK_DIV3>,
Dmeson-gxbb.dtsi753 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
Dmeson-gxl.dtsi822 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
Dmeson-axg.dtsi1192 <&clkc CLKID_FCLK_DIV3>,
Dmeson-g12-common.dtsi1676 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
/Linux-v5.10/arch/arm/boot/dts/
Dmeson8b.dtsi571 <&clkc CLKID_FCLK_DIV3>,
Dmeson8.dtsi574 <&clkc CLKID_FCLK_DIV3>,
/Linux-v5.10/drivers/clk/meson/
Dmeson8b.c2723 [CLKID_FCLK_DIV3] = &meson8b_fclk_div3.hw,
2930 [CLKID_FCLK_DIV3] = &meson8b_fclk_div3.hw,
3148 [CLKID_FCLK_DIV3] = &meson8b_fclk_div3.hw,
Daxg.c1161 [CLKID_FCLK_DIV3] = &axg_fclk_div3.hw,
Dgxbb.c2698 [CLKID_FCLK_DIV3] = &gxbb_fclk_div3.hw,
2910 [CLKID_FCLK_DIV3] = &gxbb_fclk_div3.hw,
Dg12a.c4189 [CLKID_FCLK_DIV3] = &g12a_fclk_div3.hw,
4415 [CLKID_FCLK_DIV3] = &g12a_fclk_div3.hw,
4670 [CLKID_FCLK_DIV3] = &g12a_fclk_div3.hw,