| /Linux-v4.19/drivers/gpu/drm/meson/ |
| D | meson_viu.c | 134 writel_bits_relaxed(3 << 30, m[21] << 30, in meson_viu_set_osd_matrix()
136 writel_bits_relaxed(7 << 16, m[22] << 16, in meson_viu_set_osd_matrix()
140 writel_bits_relaxed(BIT(0), csc_on ? BIT(0) : 0, in meson_viu_set_osd_matrix()
142 writel_bits_relaxed(BIT(1), 0, in meson_viu_set_osd_matrix()
153 writel_bits_relaxed(BIT(30), csc_on ? BIT(30) : 0, in meson_viu_set_osd_matrix()
155 writel_bits_relaxed(BIT(31), csc_on ? BIT(31) : 0, in meson_viu_set_osd_matrix()
206 writel_bits_relaxed(0x7 << 29, 7 << 29, in meson_viu_set_osd_lut()
209 writel_bits_relaxed(0x7 << 29, 0, in meson_viu_set_osd_lut()
233 writel_bits_relaxed(7 << 27, 7 << 27, in meson_viu_set_osd_lut()
236 writel_bits_relaxed(7 << 27, 0, in meson_viu_set_osd_lut()
[all …]
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| D | meson_vpp.c | 131 writel_bits_relaxed(0xff << 16, 0xff << 16, in meson_vpp_init()
144 writel_bits_relaxed(VPP_PREBLEND_ENABLE, 0, in meson_vpp_init()
148 writel_bits_relaxed(VPP_POSTBLEND_ENABLE, 0, in meson_vpp_init()
152 writel_bits_relaxed(VPP_OSD1_POSTBLEND | VPP_OSD2_POSTBLEND | in meson_vpp_init()
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| D | meson_dw_hdmi.c | 430 writel_bits_relaxed(0x3, 0, in dw_hdmi_phy_init()
432 writel_bits_relaxed(0xf << 8, 0, in dw_hdmi_phy_init()
442 writel_bits_relaxed(0xf << 8, wr_clk & (0xf << 8), in dw_hdmi_phy_init()
447 writel_bits_relaxed(0x3, MESON_VENC_SOURCE_ENCI, in dw_hdmi_phy_init()
450 writel_bits_relaxed(0x3, MESON_VENC_SOURCE_ENCP, in dw_hdmi_phy_init()
635 writel_bits_relaxed(0x3, 0, in meson_venc_hdmi_encoder_disable()
860 writel_bits_relaxed(BIT(15), BIT(15), in meson_dw_hdmi_bind()
862 writel_bits_relaxed(BIT(15), BIT(15), in meson_dw_hdmi_bind()
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| D | meson_plane.c | 118 writel_bits_relaxed(OSD_REPLACE_EN, OSD_REPLACE_EN, in meson_plane_atomic_update()
125 writel_bits_relaxed(OSD_REPLACE_EN, 0, in meson_plane_atomic_update()
177 writel_bits_relaxed(VPP_OSD1_POSTBLEND, 0, in meson_plane_atomic_disable()
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| D | meson_crtc.c | 101 writel_bits_relaxed(VPP_POSTBLEND_ENABLE, VPP_POSTBLEND_ENABLE, in meson_crtc_atomic_enable()
117 writel_bits_relaxed(VPP_POSTBLEND_ENABLE, 0, in meson_crtc_atomic_disable()
202 writel_bits_relaxed(VPP_OSD1_POSTBLEND, VPP_OSD1_POSTBLEND, in meson_crtc_irq()
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| D | meson_venc_cvbs.c | 180 writel_bits_relaxed(BIT(5), 0, priv->io_base + _REG(VENC_VDAC_DACSEL0)); in meson_venc_cvbs_encoder_enable()
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| D | meson_venc.c | 916 writel_bits_relaxed(0xff, 0xff, in meson_venc_hdmi_mode_set()
1253 writel_bits_relaxed(BIT(14), BIT(14), in meson_venc_hdmi_mode_set()
1552 writel_bits_relaxed(0x3, 0, in meson_venc_init()
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| D | meson_registers.h | 22 #define writel_bits_relaxed(mask, val, addr) \ macro
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| /Linux-v4.19/drivers/spi/ |
| D | spi-meson-spicc.c | 117 #define writel_bits_relaxed(mask, val, addr) \ macro
230 writel_bits_relaxed(SPICC_BURSTLENGTH_MASK, in meson_spicc_setup_burst()
288 writel_bits_relaxed(SPICC_XCH, SPICC_XCH, in meson_spicc_irq()
388 writel_bits_relaxed(SPICC_XCH, SPICC_XCH, spicc->base + SPICC_CONREG); in meson_spicc_transfer_one()
448 writel_bits_relaxed(BIT(24), BIT(24), spicc->base + SPICC_TESTREG); in meson_spicc_prepare_message()
461 writel_bits_relaxed(SPICC_ENABLE, 0, spicc->base + SPICC_CONREG); in meson_spicc_unprepare_transfer()
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| /Linux-v4.19/drivers/media/platform/meson/ |
| D | ao-cec.c | 228 #define writel_bits_relaxed(mask, val, addr) \ macro
309 writel_bits_relaxed(cfg, enable ? cfg : 0, in meson_ao_cec_irq_setup()
550 writel_bits_relaxed(CEC_GEN_CNTL_RESET, CEC_GEN_CNTL_RESET, in meson_ao_cec_adap_enable()
557 writel_bits_relaxed(CEC_GEN_CNTL_CLK_CTRL_MASK, in meson_ao_cec_adap_enable()
565 writel_bits_relaxed(CEC_GEN_CNTL_RESET, 0, in meson_ao_cec_adap_enable()
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