| /Linux-v4.19/drivers/net/ethernet/samsung/sxgbe/ |
| D | sxgbe_mtl.c | 26 u32 reg_val; in sxgbe_mtl_init() local
28 reg_val = readl(ioaddr + SXGBE_MTL_OP_MODE_REG); in sxgbe_mtl_init()
29 reg_val &= ETS_RST; in sxgbe_mtl_init()
34 reg_val &= ETS_WRR; in sxgbe_mtl_init()
37 reg_val |= ETS_WFQ; in sxgbe_mtl_init()
40 reg_val |= ETS_DWRR; in sxgbe_mtl_init()
43 writel(reg_val, ioaddr + SXGBE_MTL_OP_MODE_REG); in sxgbe_mtl_init()
47 reg_val &= RAA_SP; in sxgbe_mtl_init()
50 reg_val |= RAA_WSP; in sxgbe_mtl_init()
53 writel(reg_val, ioaddr + SXGBE_MTL_OP_MODE_REG); in sxgbe_mtl_init()
[all …]
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| /Linux-v4.19/drivers/gpu/drm/amd/display/dc/ |
| D | dc_helper.c | 33 uint32_t addr, uint32_t reg_val, int n, in generic_reg_update_ex() argument
43 reg_val = set_reg_field_value_ex(reg_val, field_value1, mask1, shift1); in generic_reg_update_ex()
50 reg_val = set_reg_field_value_ex(reg_val, field_value, mask, shift); in generic_reg_update_ex()
54 dm_write_reg(ctx, addr, reg_val); in generic_reg_update_ex()
57 return reg_val; in generic_reg_update_ex()
63 uint32_t reg_val = dm_read_reg(ctx, addr); in generic_reg_get() local
64 *field_value = get_reg_field_value_ex(reg_val, mask, shift); in generic_reg_get()
65 return reg_val; in generic_reg_get()
72 uint32_t reg_val = dm_read_reg(ctx, addr); in generic_reg_get2() local
73 *field_value1 = get_reg_field_value_ex(reg_val, mask1, shift1); in generic_reg_get2()
[all …]
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| /Linux-v4.19/arch/arm/mach-iop13xx/ |
| D | pci.c | 568 u32 reg_val; in iop13xx_atue_setup() local
614 reg_val = __raw_readl(IOP13XX_ATUE_OIOBAR); in iop13xx_atue_setup()
615 reg_val &= ~0x7; in iop13xx_atue_setup()
616 reg_val |= func; in iop13xx_atue_setup()
617 __raw_writel(reg_val, IOP13XX_ATUE_OIOBAR); in iop13xx_atue_setup()
621 reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR0); in iop13xx_atue_setup()
622 reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK << in iop13xx_atue_setup()
624 reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM; in iop13xx_atue_setup()
625 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR0); in iop13xx_atue_setup()
627 reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR1); in iop13xx_atue_setup()
[all …]
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| /Linux-v4.19/drivers/input/keyboard/ |
| D | imx_keypad.c | 82 unsigned short reg_val; in imx_keypad_scan_matrix() local
93 reg_val = readw(keypad->mmio_base + KPDR); in imx_keypad_scan_matrix()
94 reg_val |= 0xff00; in imx_keypad_scan_matrix()
95 writew(reg_val, keypad->mmio_base + KPDR); in imx_keypad_scan_matrix()
97 reg_val = readw(keypad->mmio_base + KPCR); in imx_keypad_scan_matrix()
98 reg_val &= ~((keypad->cols_en_mask & 0xff) << 8); in imx_keypad_scan_matrix()
99 writew(reg_val, keypad->mmio_base + KPCR); in imx_keypad_scan_matrix()
103 reg_val = readw(keypad->mmio_base + KPCR); in imx_keypad_scan_matrix()
104 reg_val |= (keypad->cols_en_mask & 0xff) << 8; in imx_keypad_scan_matrix()
105 writew(reg_val, keypad->mmio_base + KPCR); in imx_keypad_scan_matrix()
[all …]
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| /Linux-v4.19/drivers/media/dvb-frontends/ |
| D | af9033_priv.h | 28 struct reg_val { struct
96 static const struct reg_val ofsm_init[] = {
211 static const struct reg_val tuner_init_tua9001[] = {
255 static const struct reg_val tuner_init_fc0011[] = {
318 static const struct reg_val tuner_init_fc0012[] = {
363 static const struct reg_val tuner_init_mxl5007t[] = {
400 static const struct reg_val tuner_init_tda18218[] = {
436 static const struct reg_val tuner_init_fc2580[] = {
476 static const struct reg_val ofsm_init_it9135_v1[] = {
591 static const struct reg_val tuner_init_it9135_38[] = {
[all …]
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| /Linux-v4.19/drivers/net/phy/ |
| D | mscc.c | 139 u16 reg_val; in vsc85xx_led_cntl_set() local
142 reg_val = phy_read(phydev, MSCC_PHY_LED_MODE_SEL); in vsc85xx_led_cntl_set()
144 reg_val &= ~LED_1_MODE_SEL_MASK; in vsc85xx_led_cntl_set()
145 reg_val |= (((u16)mode << LED_1_MODE_SEL_POS) & in vsc85xx_led_cntl_set()
148 reg_val &= ~LED_0_MODE_SEL_MASK; in vsc85xx_led_cntl_set()
149 reg_val |= ((u16)mode & LED_0_MODE_SEL_MASK); in vsc85xx_led_cntl_set()
151 rc = phy_write(phydev, MSCC_PHY_LED_MODE_SEL, reg_val); in vsc85xx_led_cntl_set()
159 u16 reg_val; in vsc85xx_mdix_get() local
161 reg_val = phy_read(phydev, MSCC_PHY_DEV_AUX_CNTL); in vsc85xx_mdix_get()
162 if (reg_val & HP_AUTO_MDIX_X_OVER_IND_MASK) in vsc85xx_mdix_get()
[all …]
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| /Linux-v4.19/drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_hw_vbif.c | 70 u32 reg_val; in dpu_hw_set_mem_type() local
88 reg_val = DPU_REG_READ(c, reg_off); in dpu_hw_set_mem_type()
89 reg_val &= ~(0x7 << bit_off); in dpu_hw_set_mem_type()
90 reg_val |= (value & 0x7) << bit_off; in dpu_hw_set_mem_type()
91 DPU_REG_WRITE(c, reg_off, reg_val); in dpu_hw_set_mem_type()
98 u32 reg_val; in dpu_hw_set_limit_conf() local
109 reg_val = DPU_REG_READ(c, reg_off); in dpu_hw_set_limit_conf()
110 reg_val &= ~(0xFF << bit_off); in dpu_hw_set_limit_conf()
111 reg_val |= (limit) << bit_off; in dpu_hw_set_limit_conf()
112 DPU_REG_WRITE(c, reg_off, reg_val); in dpu_hw_set_limit_conf()
[all …]
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| /Linux-v4.19/sound/drivers/opl3/ |
| D | opl3_synth.c | 408 unsigned char reg_val; in snd_opl3_play_note() local
428 reg_val = (unsigned char) note->fnum; in snd_opl3_play_note()
430 opl3->command(opl3, opl3_reg, reg_val); in snd_opl3_play_note()
432 reg_val = 0x00; in snd_opl3_play_note()
435 reg_val |= OPL3_KEYON_BIT; in snd_opl3_play_note()
437 reg_val |= (note->octave << 2) & OPL3_BLOCKNUM_MASK; in snd_opl3_play_note()
439 reg_val |= (unsigned char) (note->fnum >> 8) & OPL3_FNUM_HIGH_MASK; in snd_opl3_play_note()
443 opl3->command(opl3, opl3_reg, reg_val); in snd_opl3_play_note()
456 unsigned char reg_val; in snd_opl3_set_voice() local
482 reg_val = 0x00; in snd_opl3_set_voice()
[all …]
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| /Linux-v4.19/drivers/net/ethernet/allwinner/ |
| D | sun4i-emac.c | 96 unsigned int reg_val; in emac_update_speed() local
99 reg_val = readl(db->membase + EMAC_MAC_SUPP_REG); in emac_update_speed()
100 reg_val &= ~(0x1 << 8); in emac_update_speed()
102 reg_val |= 1 << 8; in emac_update_speed()
103 writel(reg_val, db->membase + EMAC_MAC_SUPP_REG); in emac_update_speed()
109 unsigned int reg_val; in emac_update_duplex() local
112 reg_val = readl(db->membase + EMAC_MAC_CTL1_REG); in emac_update_duplex()
113 reg_val &= ~EMAC_MAC_CTL1_DUPLEX_EN; in emac_update_duplex()
115 reg_val |= EMAC_MAC_CTL1_DUPLEX_EN; in emac_update_duplex()
116 writel(reg_val, db->membase + EMAC_MAC_CTL1_REG); in emac_update_duplex()
[all …]
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| /Linux-v4.19/drivers/spi/ |
| D | spi-mt65xx.c | 158 u32 reg_val; in mtk_spi_reset() local
161 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_reset()
162 reg_val |= SPI_CMD_RST; in mtk_spi_reset()
163 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_reset()
165 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_reset()
166 reg_val &= ~SPI_CMD_RST; in mtk_spi_reset()
167 writel(reg_val, mdata->base + SPI_CMD_REG); in mtk_spi_reset()
174 u32 reg_val; in mtk_spi_prepare_message() local
182 reg_val = readl(mdata->base + SPI_CMD_REG); in mtk_spi_prepare_message()
184 reg_val |= SPI_CMD_CPHA; in mtk_spi_prepare_message()
[all …]
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| /Linux-v4.19/drivers/gpu/drm/msm/hdmi/ |
| D | hdmi_hdcp.c | 54 u32 reg_val; member
208 u32 reg_val, hdcp_int_status; in msm_hdmi_hdcp_irq() local
212 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_INT_CTRL); in msm_hdmi_hdcp_irq()
213 hdcp_int_status = reg_val & HDCP_INT_STATUS_MASK; in msm_hdmi_hdcp_irq()
219 reg_val |= hdcp_int_status << 1; in msm_hdmi_hdcp_irq()
222 reg_val |= HDMI_HDCP_INT_CTRL_AUTH_FAIL_INFO_ACK; in msm_hdmi_hdcp_irq()
223 hdmi_write(hdmi, REG_HDMI_HDCP_INT_CTRL, reg_val); in msm_hdmi_hdcp_irq()
237 reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_LINK0_STATUS); in msm_hdmi_hdcp_irq()
239 __func__, reg_val); in msm_hdmi_hdcp_irq()
293 u32 reg_val, failure, nack0; in msm_reset_hdcp_ddc_failures() local
[all …]
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| /Linux-v4.19/arch/mips/pci/ |
| D | fixup-malta.c | 70 unsigned char reg_val; in malta_piix_func0_fixup() local
84 pci_read_config_byte(pdev, PIIX4_FUNC0_PIRQRC+i, ®_val); in malta_piix_func0_fixup()
85 if (reg_val & PIIX4_FUNC0_PIRQRC_IRQ_ROUTING_DISABLE) in malta_piix_func0_fixup()
88 pci_irq[PCIA+i] = piixirqmap[reg_val & in malta_piix_func0_fixup()
98 pci_read_config_byte(pdev, PIIX4_FUNC0_TOM, ®_val); in malta_piix_func0_fixup()
99 pci_write_config_byte(pdev, PIIX4_FUNC0_TOM, reg_val | in malta_piix_func0_fixup()
109 pci_read_config_byte(pdev, PIIX4_FUNC0_SERIRQC, ®_val); in malta_piix_func0_fixup()
110 reg_val |= PIIX4_FUNC0_SERIRQC_EN | PIIX4_FUNC0_SERIRQC_CONT; in malta_piix_func0_fixup()
111 pci_write_config_byte(pdev, PIIX4_FUNC0_SERIRQC, reg_val); in malta_piix_func0_fixup()
124 unsigned char reg_val; in malta_piix_func1_fixup() local
[all …]
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| /Linux-v4.19/drivers/ata/ |
| D | ahci_sunxi.c | 63 u32 reg_val; in sunxi_clrbits() local
65 reg_val = readl(reg); in sunxi_clrbits()
66 reg_val &= ~(clr_val); in sunxi_clrbits()
67 writel(reg_val, reg); in sunxi_clrbits()
72 u32 reg_val; in sunxi_setbits() local
74 reg_val = readl(reg); in sunxi_setbits()
75 reg_val |= set_val; in sunxi_setbits()
76 writel(reg_val, reg); in sunxi_setbits()
81 u32 reg_val; in sunxi_clrsetbits() local
83 reg_val = readl(reg); in sunxi_clrsetbits()
[all …]
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| /Linux-v4.19/drivers/gpu/drm/i915/ |
| D | i915_gem_stolen.c | 184 u32 reg_val = I915_READ(IS_GM45(dev_priv) ? in g4x_get_stolen_reserved() local
190 IS_GM45(dev_priv) ? "CTG" : "ELK", reg_val); in g4x_get_stolen_reserved()
192 if ((reg_val & G4X_STOLEN_RESERVED_ENABLE) == 0) in g4x_get_stolen_reserved()
199 WARN(IS_GEN5(dev_priv), "ILK stolen reserved found? 0x%08x\n", reg_val); in g4x_get_stolen_reserved()
201 if (!(reg_val & G4X_STOLEN_RESERVED_ADDR2_MASK)) in g4x_get_stolen_reserved()
204 *base = (reg_val & G4X_STOLEN_RESERVED_ADDR2_MASK) << 16; in g4x_get_stolen_reserved()
205 WARN_ON((reg_val & G4X_STOLEN_RESERVED_ADDR1_MASK) < *base); in g4x_get_stolen_reserved()
214 u32 reg_val = I915_READ(GEN6_STOLEN_RESERVED); in gen6_get_stolen_reserved() local
216 DRM_DEBUG_DRIVER("GEN6_STOLEN_RESERVED = %08x\n", reg_val); in gen6_get_stolen_reserved()
218 if (!(reg_val & GEN6_STOLEN_RESERVED_ENABLE)) in gen6_get_stolen_reserved()
[all …]
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| /Linux-v4.19/drivers/net/ethernet/cavium/liquidio/ |
| D | cn23xx_vf_device.c | 68 u64 reg_val = octeon_read_csr64(oct, in cn23xx_vf_reset_io_queues() local
70 while ((READ_ONCE(reg_val) & CN23XX_PKT_INPUT_CTL_RST) && in cn23xx_vf_reset_io_queues()
71 !(READ_ONCE(reg_val) & CN23XX_PKT_INPUT_CTL_QUIET) && in cn23xx_vf_reset_io_queues()
73 WRITE_ONCE(reg_val, octeon_read_csr64( in cn23xx_vf_reset_io_queues()
83 WRITE_ONCE(reg_val, READ_ONCE(reg_val) & in cn23xx_vf_reset_io_queues()
86 READ_ONCE(reg_val)); in cn23xx_vf_reset_io_queues()
88 WRITE_ONCE(reg_val, octeon_read_csr64( in cn23xx_vf_reset_io_queues()
90 if (READ_ONCE(reg_val) & CN23XX_PKT_INPUT_CTL_RST) { in cn23xx_vf_reset_io_queues()
153 u32 reg_val; in cn23xx_vf_setup_global_output_regs() local
160 reg_val = in cn23xx_vf_setup_global_output_regs()
[all …]
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| D | cn23xx_pf_device.c | 305 u64 reg_val; in cn23xx_setup_global_mac_regs() local
314 reg_val = in cn23xx_setup_global_mac_regs()
319 reg_val = pf_num * CN23XX_MAX_RINGS_PER_PF_PASS_1_1; in cn23xx_setup_global_mac_regs()
322 reg_val = pf_num * CN23XX_MAX_RINGS_PER_PF; in cn23xx_setup_global_mac_regs()
326 reg_val = reg_val | in cn23xx_setup_global_mac_regs()
330 reg_val |= (temp << CN23XX_PKT_MAC_CTL_RINFO_RPVF_BIT_POS); in cn23xx_setup_global_mac_regs()
334 reg_val |= (temp << CN23XX_PKT_MAC_CTL_RINFO_NVFS_BIT_POS); in cn23xx_setup_global_mac_regs()
338 reg_val); in cn23xx_setup_global_mac_regs()
368 u64 reg_val = octeon_read_csr64(oct, in cn23xx_reset_io_queues() local
370 while ((READ_ONCE(reg_val) & CN23XX_PKT_INPUT_CTL_RST) && in cn23xx_reset_io_queues()
[all …]
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| /Linux-v4.19/drivers/video/backlight/ |
| D | lm3639_bl.c | 54 unsigned int reg_val; in lm3639_chip_init() local
64 reg_val = (pdata->pin_pwm & 0x40) | pdata->pin_strobe | pdata->pin_tx; in lm3639_chip_init()
65 ret = regmap_update_bits(pchip->regmap, REG_IO_CTRL, 0x7C, reg_val); in lm3639_chip_init()
80 reg_val = pdata->fled_pins; in lm3639_chip_init()
81 reg_val |= pdata->bled_pins; in lm3639_chip_init()
83 reg_val = pdata->fled_pins; in lm3639_chip_init()
84 reg_val |= pdata->bled_pins | 0x01; in lm3639_chip_init()
87 ret = regmap_update_bits(pchip->regmap, REG_ENABLE, 0x79, reg_val); in lm3639_chip_init()
101 unsigned int reg_val; in lm3639_bled_update_status() local
105 ret = regmap_read(pchip->regmap, REG_FLAG, ®_val); in lm3639_bled_update_status()
[all …]
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| /Linux-v4.19/drivers/net/wireless/ath/ath10k/ |
| D | hw.c | 748 u32 addr, reg_val, mem_val; in ath10k_hw_qca6174_enable_pll_clock() local
765 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val); in ath10k_hw_qca6174_enable_pll_clock()
770 if (MS(reg_val, EFUSE_XTAL_SEL) > ATH10K_HW_REFCLK_COUNT) in ath10k_hw_qca6174_enable_pll_clock()
773 hw_clk = &hw->hw_clk[MS(reg_val, EFUSE_XTAL_SEL)]; in ath10k_hw_qca6174_enable_pll_clock()
777 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val); in ath10k_hw_qca6174_enable_pll_clock()
781 reg_val &= ~(BB_PLL_CONFIG_FRAC_MASK | BB_PLL_CONFIG_OUTDIV_MASK); in ath10k_hw_qca6174_enable_pll_clock()
782 reg_val |= (SM(hw_clk->rnfrac, BB_PLL_CONFIG_FRAC) | in ath10k_hw_qca6174_enable_pll_clock()
784 ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val); in ath10k_hw_qca6174_enable_pll_clock()
790 ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val); in ath10k_hw_qca6174_enable_pll_clock()
794 reg_val &= ~WLAN_PLL_SETTLE_TIME_MASK; in ath10k_hw_qca6174_enable_pll_clock()
[all …]
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| /Linux-v4.19/drivers/mtd/nand/raw/ |
| D | omap_elm.c | 113 u32 reg_val; in elm_config() local
131 reg_val = (bch_type & ECC_BCH_LEVEL_MASK) | (ELM_ECC_SIZE << 16); in elm_config()
132 elm_write_reg(info, ELM_LOCATION_CONFIG, reg_val); in elm_config()
152 u32 reg_val; in elm_configure_page_mode() local
154 reg_val = elm_read_reg(info, ELM_PAGE_CTRL); in elm_configure_page_mode()
156 reg_val |= BIT(index); /* enable page mode */ in elm_configure_page_mode()
158 reg_val &= ~BIT(index); /* disable page mode */ in elm_configure_page_mode()
160 elm_write_reg(info, ELM_PAGE_CTRL, reg_val); in elm_configure_page_mode()
261 u32 reg_val; in elm_start_processing() local
271 reg_val = elm_read_reg(info, offset); in elm_start_processing()
[all …]
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| /Linux-v4.19/arch/x86/hyperv/ |
| D | hv_apic.c | 40 u64 reg_val; in hv_apic_icr_read() local
42 rdmsrl(HV_X64_MSR_ICR, reg_val); in hv_apic_icr_read()
43 return reg_val; in hv_apic_icr_read()
48 u64 reg_val; in hv_apic_icr_write() local
50 reg_val = SET_APIC_DEST_FIELD(id); in hv_apic_icr_write()
51 reg_val = reg_val << 32; in hv_apic_icr_write()
52 reg_val |= low; in hv_apic_icr_write()
54 wrmsrl(HV_X64_MSR_ICR, reg_val); in hv_apic_icr_write()
59 u32 reg_val, hi; in hv_apic_read() local
63 rdmsr(HV_X64_MSR_EOI, reg_val, hi); in hv_apic_read()
[all …]
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| /Linux-v4.19/drivers/media/i2c/ |
| D | lm3646.c | 105 unsigned int reg_val; in lm3646_get_ctrl() local
111 rval = regmap_read(flash->regmap, REG_FLAG, ®_val); in lm3646_get_ctrl()
116 if (reg_val & FAULT_TIMEOUT) in lm3646_get_ctrl()
118 if (reg_val & FAULT_SHORT_CIRCUIT) in lm3646_get_ctrl()
120 if (reg_val & FAULT_UVLO) in lm3646_get_ctrl()
122 if (reg_val & FAULT_IVFM) in lm3646_get_ctrl()
124 if (reg_val & FAULT_OCP) in lm3646_get_ctrl()
126 if (reg_val & FAULT_OVERTEMP) in lm3646_get_ctrl()
128 if (reg_val & FAULT_NTC_TRIP) in lm3646_get_ctrl()
130 if (reg_val & FAULT_OVP) in lm3646_get_ctrl()
[all …]
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| /Linux-v4.19/arch/arm/mach-qcom/ |
| D | platsmp.c | 176 unsigned reg_val; in kpssv2_release_secondary() local
214 reg_val = (64 << BHS_CNT_SHIFT) | (0x3f << LDO_PWR_DWN_SHIFT) | BHS_EN; in kpssv2_release_secondary()
215 writel_relaxed(reg_val, reg + APC_PWR_GATE_CTL); in kpssv2_release_secondary()
221 reg_val |= 0x3f << BHS_SEG_SHIFT; in kpssv2_release_secondary()
222 writel_relaxed(reg_val, reg + APC_PWR_GATE_CTL); in kpssv2_release_secondary()
228 reg_val |= 0x3f << LDO_BYP_SHIFT; in kpssv2_release_secondary()
229 writel_relaxed(reg_val, reg + APC_PWR_GATE_CTL); in kpssv2_release_secondary()
236 reg_val = COREPOR_RST | CLAMP; in kpssv2_release_secondary()
237 writel_relaxed(reg_val, reg + APCS_CPU_PWR_CTL); in kpssv2_release_secondary()
241 reg_val &= ~CLAMP; in kpssv2_release_secondary()
[all …]
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| /Linux-v4.19/drivers/clk/bcm/ |
| D | clk-kona.c | 41 static inline u32 bitfield_extract(u32 reg_val, u32 shift, u32 width) in bitfield_extract() argument
43 return (reg_val & bitfield_mask(shift, width)) >> shift; in bitfield_extract()
47 static inline u32 bitfield_replace(u32 reg_val, u32 shift, u32 width, u32 val) in bitfield_replace() argument
51 return (reg_val & ~mask) | (val << shift); in bitfield_replace()
136 __ccu_write(struct ccu_data *ccu, u32 reg_offset, u32 reg_val) in __ccu_write() argument
138 writel(reg_val, ccu->base + reg_offset); in __ccu_write()
336 u32 reg_val; in policy_init() local
338 reg_val = __ccu_read(ccu, offset); in policy_init()
339 reg_val |= mask; in policy_init()
340 __ccu_write(ccu, offset, reg_val); in policy_init()
[all …]
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| /Linux-v4.19/drivers/mfd/ |
| D | adp5520.c | 74 uint8_t reg_val; in __adp5520_ack_bits() local
79 ret = __adp5520_read(client, reg, ®_val); in __adp5520_ack_bits()
82 reg_val |= bit_mask; in __adp5520_ack_bits()
83 ret = __adp5520_write(client, reg, reg_val); in __adp5520_ack_bits()
105 uint8_t reg_val; in adp5520_set_bits() local
110 ret = __adp5520_read(chip->client, reg, ®_val); in adp5520_set_bits()
112 if (!ret && ((reg_val & bit_mask) != bit_mask)) { in adp5520_set_bits()
113 reg_val |= bit_mask; in adp5520_set_bits()
114 ret = __adp5520_write(chip->client, reg, reg_val); in adp5520_set_bits()
125 uint8_t reg_val; in adp5520_clr_bits() local
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| /Linux-v4.19/arch/mips/netlogic/xlp/ |
| D | ahci-init.c | 97 uint32_t reg_val; in sata_clear_glue_reg() local
99 reg_val = nlm_read_sata_reg(regbase, off); in sata_clear_glue_reg()
100 nlm_write_sata_reg(regbase, off, (reg_val & ~bit)); in sata_clear_glue_reg()
105 uint32_t reg_val; in sata_set_glue_reg() local
107 reg_val = nlm_read_sata_reg(regbase, off); in sata_set_glue_reg()
108 nlm_write_sata_reg(regbase, off, (reg_val | bit)); in sata_set_glue_reg()
113 uint32_t reg_val; in nlm_sata_firmware_init() local
137 reg_val = nlm_read_sata_reg(regbase, SATA_STATUS); in nlm_sata_firmware_init()
139 } while (((reg_val & 0xF0) != 0xF0) && (i < 10000)); in nlm_sata_firmware_init()
142 if (reg_val & (P0_PHY_READY << i)) in nlm_sata_firmware_init()
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