| /Linux-v4.19/arch/mips/include/asm/ |
| D | asm-eva.h | 18 #define kernel_ll(reg, addr) "ll " reg ", " addr "\n" argument
19 #define kernel_sc(reg, addr) "sc " reg ", " addr "\n" argument
20 #define kernel_lw(reg, addr) "lw " reg ", " addr "\n" argument
21 #define kernel_lwl(reg, addr) "lwl " reg ", " addr "\n" argument
22 #define kernel_lwr(reg, addr) "lwr " reg ", " addr "\n" argument
23 #define kernel_lh(reg, addr) "lh " reg ", " addr "\n" argument
24 #define kernel_lb(reg, addr) "lb " reg ", " addr "\n" argument
25 #define kernel_lbu(reg, addr) "lbu " reg ", " addr "\n" argument
26 #define kernel_sw(reg, addr) "sw " reg ", " addr "\n" argument
27 #define kernel_swl(reg, addr) "swl " reg ", " addr "\n" argument
[all …]
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| /Linux-v4.19/arch/parisc/include/asm/ |
| D | asmregs.h | 24 rp: .reg %r2
25 arg3: .reg %r23
26 arg2: .reg %r24
27 arg1: .reg %r25
28 arg0: .reg %r26
29 dp: .reg %r27
30 ret0: .reg %r28
31 ret1: .reg %r29
32 sl: .reg %r29
33 sp: .reg %r30
[all …]
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| /Linux-v4.19/drivers/gpu/drm/bridge/analogix/ |
| D | analogix_dp_reg.c | 32 u32 reg; in analogix_dp_enable_video_mute() local
35 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
36 reg |= HDCP_VIDEO_MUTE; in analogix_dp_enable_video_mute()
37 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
39 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
40 reg &= ~HDCP_VIDEO_MUTE; in analogix_dp_enable_video_mute()
41 writel(reg, dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
47 u32 reg; in analogix_dp_stop_video() local
49 reg = readl(dp->reg_base + ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_stop_video()
50 reg &= ~VIDEO_EN; in analogix_dp_stop_video()
[all …]
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| /Linux-v4.19/tools/testing/selftests/powerpc/include/ |
| D | vmx_asm.h | 13 #define PUSH_VMX(pos,reg) \ argument
14 li reg,pos; \
15 stvx v20,reg,%r1; \
16 addi reg,reg,16; \
17 stvx v21,reg,%r1; \
18 addi reg,reg,16; \
19 stvx v22,reg,%r1; \
20 addi reg,reg,16; \
21 stvx v23,reg,%r1; \
22 addi reg,reg,16; \
[all …]
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| /Linux-v4.19/drivers/media/platform/s5p-cec/ |
| D | exynos_hdmi_cecctrl.c | 29 unsigned int reg; in s5p_cec_set_divider() local
33 if (regmap_read(cec->pmu, EXYNOS_HDMI_PHY_CONTROL, ®)) { in s5p_cec_set_divider()
38 reg = (reg & ~(0x3FF << 16)) | (div_ratio << 16); in s5p_cec_set_divider()
40 if (regmap_write(cec->pmu, EXYNOS_HDMI_PHY_CONTROL, reg)) { in s5p_cec_set_divider()
47 writeb(0x0, cec->reg + S5P_CEC_DIVISOR_3); in s5p_cec_set_divider()
48 writeb(0x0, cec->reg + S5P_CEC_DIVISOR_2); in s5p_cec_set_divider()
49 writeb(0x0, cec->reg + S5P_CEC_DIVISOR_1); in s5p_cec_set_divider()
50 writeb(div_val, cec->reg + S5P_CEC_DIVISOR_0); in s5p_cec_set_divider()
55 u8 reg; in s5p_cec_enable_rx() local
57 reg = readb(cec->reg + S5P_CEC_RX_CTRL); in s5p_cec_enable_rx()
[all …]
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| /Linux-v4.19/drivers/media/platform/s5p-jpeg/ |
| D | jpeg-hw-s5p.c | 22 unsigned long reg; in s5p_jpeg_reset() local
25 reg = readl(regs + S5P_JPG_SW_RESET); in s5p_jpeg_reset()
27 while (reg != 0) { in s5p_jpeg_reset()
29 reg = readl(regs + S5P_JPG_SW_RESET); in s5p_jpeg_reset()
40 unsigned long reg, m; in s5p_jpeg_input_raw_mode() local
48 reg = readl(regs + S5P_JPGCMOD); in s5p_jpeg_input_raw_mode()
49 reg &= ~S5P_MOD_SEL_MASK; in s5p_jpeg_input_raw_mode()
50 reg |= m; in s5p_jpeg_input_raw_mode()
51 writel(reg, regs + S5P_JPGCMOD); in s5p_jpeg_input_raw_mode()
56 unsigned long reg, m; in s5p_jpeg_proc_mode() local
[all …]
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| D | jpeg-hw-exynos4.c | 21 unsigned int reg; in exynos4_jpeg_sw_reset() local
23 reg = readl(base + EXYNOS4_JPEG_CNTL_REG); in exynos4_jpeg_sw_reset()
24 writel(reg & ~(EXYNOS4_DEC_MODE | EXYNOS4_ENC_MODE), in exynos4_jpeg_sw_reset()
27 reg = readl(base + EXYNOS4_JPEG_CNTL_REG); in exynos4_jpeg_sw_reset()
28 writel(reg & ~EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG); in exynos4_jpeg_sw_reset()
32 writel(reg | EXYNOS4_SOFT_RESET_HI, base + EXYNOS4_JPEG_CNTL_REG); in exynos4_jpeg_sw_reset()
37 unsigned int reg; in exynos4_jpeg_set_enc_dec_mode() local
39 reg = readl(base + EXYNOS4_JPEG_CNTL_REG); in exynos4_jpeg_set_enc_dec_mode()
42 writel((reg & EXYNOS4_ENC_DEC_MODE_MASK) | in exynos4_jpeg_set_enc_dec_mode()
46 writel((reg & EXYNOS4_ENC_DEC_MODE_MASK) | in exynos4_jpeg_set_enc_dec_mode()
[all …]
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| D | jpeg-hw-exynos3250.c | 23 u32 reg = 1; in exynos3250_jpeg_reset() local
28 while (reg != 0 && --count > 0) { in exynos3250_jpeg_reset()
31 reg = readl(regs + EXYNOS3250_SW_RESET); in exynos3250_jpeg_reset()
34 reg = 0; in exynos3250_jpeg_reset()
37 while (reg != 1 && --count > 0) { in exynos3250_jpeg_reset()
41 reg = readl(regs + EXYNOS3250_JPGDRI); in exynos3250_jpeg_reset()
65 u32 reg; in exynos3250_jpeg_clk_set() local
67 reg = readl(base + EXYNOS3250_JPGCMOD) & ~EXYNOS3250_HALF_EN_MASK; in exynos3250_jpeg_clk_set()
69 writel(reg | EXYNOS3250_HALF_EN, base + EXYNOS3250_JPGCMOD); in exynos3250_jpeg_clk_set()
74 u32 reg; in exynos3250_jpeg_input_raw_fmt() local
[all …]
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| /Linux-v4.19/drivers/memory/tegra/ |
| D | tegra210.c | 23 .reg = 0x228,
27 .reg = 0x2e8,
37 .reg = 0x228,
41 .reg = 0x2f4,
51 .reg = 0x228,
55 .reg = 0x2e8,
65 .reg = 0x228,
69 .reg = 0x2f4,
79 .reg = 0x228,
83 .reg = 0x2ec,
[all …]
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| D | tegra30.c | 26 .reg = 0x228,
30 .reg = 0x2e8,
40 .reg = 0x228,
44 .reg = 0x2f4,
54 .reg = 0x228,
58 .reg = 0x2e8,
68 .reg = 0x228,
72 .reg = 0x2f4,
82 .reg = 0x228,
86 .reg = 0x2ec,
[all …]
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| D | tegra114.c | 26 .reg = 0x228,
30 .reg = 0x2e8,
40 .reg = 0x228,
44 .reg = 0x2f4,
54 .reg = 0x228,
58 .reg = 0x2e8,
68 .reg = 0x228,
72 .reg = 0x2f4,
82 .reg = 0x228,
86 .reg = 0x2ec,
[all …]
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| D | tegra124.c | 68 .reg = 0x228,
72 .reg = 0x2e8,
82 .reg = 0x228,
86 .reg = 0x2f4,
96 .reg = 0x228,
100 .reg = 0x2e8,
110 .reg = 0x228,
114 .reg = 0x2f4,
124 .reg = 0x228,
128 .reg = 0x2ec,
[all …]
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| /Linux-v4.19/drivers/scsi/qla2xxx/ |
| D | qla_dbg.c | 117 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla27xx_dump_mpi_ram() local
124 WRT_REG_WORD(®->mailbox0, MBC_LOAD_DUMP_MPI_RAM); in qla27xx_dump_mpi_ram()
133 WRT_REG_WORD(®->mailbox1, LSW(addr)); in qla27xx_dump_mpi_ram()
134 WRT_REG_WORD(®->mailbox8, MSW(addr)); in qla27xx_dump_mpi_ram()
136 WRT_REG_WORD(®->mailbox2, MSW(dump_dma)); in qla27xx_dump_mpi_ram()
137 WRT_REG_WORD(®->mailbox3, LSW(dump_dma)); in qla27xx_dump_mpi_ram()
138 WRT_REG_WORD(®->mailbox6, MSW(MSD(dump_dma))); in qla27xx_dump_mpi_ram()
139 WRT_REG_WORD(®->mailbox7, LSW(MSD(dump_dma))); in qla27xx_dump_mpi_ram()
141 WRT_REG_WORD(®->mailbox4, MSW(dwords)); in qla27xx_dump_mpi_ram()
142 WRT_REG_WORD(®->mailbox5, LSW(dwords)); in qla27xx_dump_mpi_ram()
[all …]
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| /Linux-v4.19/drivers/video/fbdev/riva/ |
| D | nvreg.h | 44 #define DEVICE_ACCESS(device,reg) \ argument
45 nvCONTROL[(NV_##device##_##reg)/4]
47 #define DEVICE_WRITE(device,reg,value) DEVICE_ACCESS(device,reg)=(value) argument
48 #define DEVICE_READ(device,reg) DEVICE_ACCESS(device,reg) argument
49 #define DEVICE_PRINT(device,reg) \ argument
50 ErrorF("NV_"#device"_"#reg"=#%08lx\n",DEVICE_ACCESS(device,reg))
56 #define PDAC_Write(reg,value) DEVICE_WRITE(PDAC,reg,value) argument
57 #define PDAC_Read(reg) DEVICE_READ(PDAC,reg) argument
58 #define PDAC_Print(reg) DEVICE_PRINT(PDAC,reg) argument
63 #define PFB_Write(reg,value) DEVICE_WRITE(PFB,reg,value) argument
[all …]
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| /Linux-v4.19/drivers/media/pci/cx23885/ |
| D | cx23885-ioctl.c | 42 struct v4l2_dbg_register *reg) in cx23417_g_register() argument
49 if ((reg->reg & 0x3) != 0 || reg->reg >= 0x10000) in cx23417_g_register()
52 if (mc417_register_read(dev, (u16) reg->reg, &value)) in cx23417_g_register()
55 reg->size = 4; in cx23417_g_register()
56 reg->val = value; in cx23417_g_register()
61 struct v4l2_dbg_register *reg) in cx23885_g_register() argument
65 if (reg->match.addr > 1) in cx23885_g_register()
67 if (reg->match.addr) in cx23885_g_register()
68 return cx23417_g_register(dev, reg); in cx23885_g_register()
70 if ((reg->reg & 0x3) != 0 || reg->reg >= pci_resource_len(dev->pci, 0)) in cx23885_g_register()
[all …]
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| /Linux-v4.19/drivers/net/ethernet/intel/ixgbe/ |
| D | ixgbe_dcb_82598.c | 23 u32 reg = 0; in ixgbe_dcb_config_rx_arbiter_82598() local
28 reg = IXGBE_READ_REG(hw, IXGBE_RUPPBMR) | IXGBE_RUPPBMR_MQA; in ixgbe_dcb_config_rx_arbiter_82598()
29 IXGBE_WRITE_REG(hw, IXGBE_RUPPBMR, reg); in ixgbe_dcb_config_rx_arbiter_82598()
31 reg = IXGBE_READ_REG(hw, IXGBE_RMCS); in ixgbe_dcb_config_rx_arbiter_82598()
33 reg &= ~IXGBE_RMCS_ARBDIS; in ixgbe_dcb_config_rx_arbiter_82598()
35 reg |= IXGBE_RMCS_RRM; in ixgbe_dcb_config_rx_arbiter_82598()
37 reg |= IXGBE_RMCS_DFP; in ixgbe_dcb_config_rx_arbiter_82598()
39 IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); in ixgbe_dcb_config_rx_arbiter_82598()
46 reg = credit_refill | (credit_max << IXGBE_RT2CR_MCL_SHIFT); in ixgbe_dcb_config_rx_arbiter_82598()
49 reg |= IXGBE_RT2CR_LSP; in ixgbe_dcb_config_rx_arbiter_82598()
[all …]
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| /Linux-v4.19/drivers/net/ethernet/microchip/ |
| D | encx24j600-regmap.c | 68 static int regmap_encx24j600_sfr_read(void *context, u8 reg, u8 *val, in regmap_encx24j600_sfr_read() argument
72 u8 banked_reg = reg & ADDR_MASK; in regmap_encx24j600_sfr_read()
73 u8 bank = ((reg & BANK_MASK) >> BANK_SHIFT); in regmap_encx24j600_sfr_read()
79 if (reg < 0x80) { in regmap_encx24j600_sfr_read()
89 switch (reg) { in regmap_encx24j600_sfr_read()
112 tx_buf[i++] = reg; in regmap_encx24j600_sfr_read()
120 u8 reg, u8 *val, size_t len, in regmap_encx24j600_sfr_update() argument
123 u8 banked_reg = reg & ADDR_MASK; in regmap_encx24j600_sfr_update()
124 u8 bank = ((reg & BANK_MASK) >> BANK_SHIFT); in regmap_encx24j600_sfr_update()
128 { .tx_buf = ®, .len = sizeof(reg), }, in regmap_encx24j600_sfr_update()
[all …]
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| /Linux-v4.19/drivers/gpu/drm/amd/display/dc/inc/ |
| D | reg_helper.h | 67 #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \ argument
68 REG_SET_N(reg, 2, init_value, \
69 FN(reg, f1), v1,\
70 FN(reg, f2), v2)
72 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ argument
73 REG_SET_N(reg, 3, init_value, \
74 FN(reg, f1), v1,\
75 FN(reg, f2), v2,\
76 FN(reg, f3), v3)
78 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
[all …]
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| /Linux-v4.19/arch/mips/include/asm/octeon/ |
| D | cvmx-fau.h | 129 static inline uint64_t __cvmx_fau_store_address(uint64_t noadd, uint64_t reg) in __cvmx_fau_store_address() argument
133 cvmx_build_bits(CVMX_FAU_BITS_REGISTER, reg); in __cvmx_fau_store_address()
152 static inline uint64_t __cvmx_fau_atomic_address(uint64_t tagwait, uint64_t reg, in __cvmx_fau_atomic_address() argument
158 cvmx_build_bits(CVMX_FAU_BITS_REGISTER, reg); in __cvmx_fau_atomic_address()
170 static inline int64_t cvmx_fau_fetch_and_add64(cvmx_fau_reg_64_t reg, in cvmx_fau_fetch_and_add64() argument
173 return cvmx_read64_int64(__cvmx_fau_atomic_address(0, reg, value)); in cvmx_fau_fetch_and_add64()
185 static inline int32_t cvmx_fau_fetch_and_add32(cvmx_fau_reg_32_t reg, in cvmx_fau_fetch_and_add32() argument
188 reg ^= SWIZZLE_32; in cvmx_fau_fetch_and_add32()
189 return cvmx_read64_int32(__cvmx_fau_atomic_address(0, reg, value)); in cvmx_fau_fetch_and_add32()
200 static inline int16_t cvmx_fau_fetch_and_add16(cvmx_fau_reg_16_t reg, in cvmx_fau_fetch_and_add16() argument
[all …]
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| /Linux-v4.19/drivers/acpi/pmic/ |
| D | intel_pmic_bxtwc.c | 38 .reg = 0x63,
43 .reg = 0x65,
48 .reg = 0x67,
53 .reg = 0x6d,
58 .reg = 0x6f,
63 .reg = 0x70,
68 .reg = 0x71,
73 .reg = 0x72,
78 .reg = 0x73,
83 .reg = 0x74,
[all …]
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| D | intel_pmic_crc.c | 35 .reg = 0x63,
40 .reg = 0x62,
45 .reg = 0x64,
50 .reg = 0x6a,
55 .reg = 0x6b,
60 .reg = 0x6c,
65 .reg = 0x6d,
75 .reg = 0x66,
85 .reg = 0x69,
90 .reg = 0x68,
[all …]
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| /Linux-v4.19/drivers/net/dsa/mv88e6xxx/ |
| D | port.c | 24 int mv88e6xxx_port_read(struct mv88e6xxx_chip *chip, int port, int reg, in mv88e6xxx_port_read() argument
29 return mv88e6xxx_read(chip, addr, reg, val); in mv88e6xxx_port_read()
32 int mv88e6xxx_port_write(struct mv88e6xxx_chip *chip, int port, int reg, in mv88e6xxx_port_write() argument
37 return mv88e6xxx_write(chip, addr, reg, val); in mv88e6xxx_port_write()
48 u16 reg; in mv88e6185_port_set_pause() local
51 err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, ®); in mv88e6185_port_set_pause()
56 reg |= MV88E6XXX_PORT_STS_MY_PAUSE; in mv88e6185_port_set_pause()
58 reg &= ~MV88E6XXX_PORT_STS_MY_PAUSE; in mv88e6185_port_set_pause()
60 return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_STS, reg); in mv88e6185_port_set_pause()
75 u16 reg; in mv88e6xxx_port_set_rgmii_delay() local
[all …]
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| /Linux-v4.19/drivers/net/wireless/ralink/rt2x00/ |
| D | rt2400pci.c | 59 u32 reg; in rt2400pci_bbp_write() local
67 if (WAIT_FOR_BBP(rt2x00dev, ®)) { in rt2400pci_bbp_write()
68 reg = 0; in rt2400pci_bbp_write()
69 rt2x00_set_field32(®, BBPCSR_VALUE, value); in rt2400pci_bbp_write()
70 rt2x00_set_field32(®, BBPCSR_REGNUM, word); in rt2400pci_bbp_write()
71 rt2x00_set_field32(®, BBPCSR_BUSY, 1); in rt2400pci_bbp_write()
72 rt2x00_set_field32(®, BBPCSR_WRITE_CONTROL, 1); in rt2400pci_bbp_write()
74 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg); in rt2400pci_bbp_write()
83 u32 reg; in rt2400pci_bbp_read() local
96 if (WAIT_FOR_BBP(rt2x00dev, ®)) { in rt2400pci_bbp_read()
[all …]
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| D | rt2500pci.c | 59 u32 reg; in rt2500pci_bbp_write() local
67 if (WAIT_FOR_BBP(rt2x00dev, ®)) { in rt2500pci_bbp_write()
68 reg = 0; in rt2500pci_bbp_write()
69 rt2x00_set_field32(®, BBPCSR_VALUE, value); in rt2500pci_bbp_write()
70 rt2x00_set_field32(®, BBPCSR_REGNUM, word); in rt2500pci_bbp_write()
71 rt2x00_set_field32(®, BBPCSR_BUSY, 1); in rt2500pci_bbp_write()
72 rt2x00_set_field32(®, BBPCSR_WRITE_CONTROL, 1); in rt2500pci_bbp_write()
74 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg); in rt2500pci_bbp_write()
83 u32 reg; in rt2500pci_bbp_read() local
96 if (WAIT_FOR_BBP(rt2x00dev, ®)) { in rt2500pci_bbp_read()
[all …]
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| D | rt61pci.c | 68 u32 reg; in rt61pci_bbp_write() local
76 if (WAIT_FOR_BBP(rt2x00dev, ®)) { in rt61pci_bbp_write()
77 reg = 0; in rt61pci_bbp_write()
78 rt2x00_set_field32(®, PHY_CSR3_VALUE, value); in rt61pci_bbp_write()
79 rt2x00_set_field32(®, PHY_CSR3_REGNUM, word); in rt61pci_bbp_write()
80 rt2x00_set_field32(®, PHY_CSR3_BUSY, 1); in rt61pci_bbp_write()
81 rt2x00_set_field32(®, PHY_CSR3_READ_CONTROL, 0); in rt61pci_bbp_write()
83 rt2x00mmio_register_write(rt2x00dev, PHY_CSR3, reg); in rt61pci_bbp_write()
92 u32 reg; in rt61pci_bbp_read() local
105 if (WAIT_FOR_BBP(rt2x00dev, ®)) { in rt61pci_bbp_read()
[all …]
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