Searched refs:pm_regs (Results 1 – 2 of 2) sorted by relevance
131 } pm_regs; variable295 pm_regs.pm07_cntrl[ctr] = CBE_COUNT_ALL_CYCLES; in set_pm_event()303 pm_regs.pm07_cntrl[ctr] = 0; in set_pm_event()319 pm_regs.pm07_cntrl[ctr] = 0; in set_pm_event()320 pm_regs.pm07_cntrl[ctr] |= PM07_CTR_COUNT_CYCLES(count_cycles); in set_pm_event()321 pm_regs.pm07_cntrl[ctr] |= PM07_CTR_POLARITY(polarity); in set_pm_event()322 pm_regs.pm07_cntrl[ctr] |= PM07_CTR_INPUT_CONTROL(input_control); in set_pm_event()347 pm_regs.pm07_cntrl[ctr] |= PM07_CTR_INPUT_MUX(signal_bit); in set_pm_event()349 pm_regs.pm07_cntrl[ctr] = 0; in set_pm_event()355 pm_regs.debug_bus_control |= in set_pm_event()[all …]
132 struct mvebu_uart_pm_regs pm_regs; member746 mvuart->pm_regs.rbr = readl(port->membase + UART_RBR(port)); in mvebu_uart_suspend()747 mvuart->pm_regs.tsh = readl(port->membase + UART_TSH(port)); in mvebu_uart_suspend()748 mvuart->pm_regs.ctrl = readl(port->membase + UART_CTRL(port)); in mvebu_uart_suspend()749 mvuart->pm_regs.intr = readl(port->membase + UART_INTR(port)); in mvebu_uart_suspend()750 mvuart->pm_regs.stat = readl(port->membase + UART_STAT); in mvebu_uart_suspend()751 mvuart->pm_regs.brdv = readl(port->membase + UART_BRDV); in mvebu_uart_suspend()752 mvuart->pm_regs.osamp = readl(port->membase + UART_OSAMP); in mvebu_uart_suspend()764 writel(mvuart->pm_regs.rbr, port->membase + UART_RBR(port)); in mvebu_uart_resume()765 writel(mvuart->pm_regs.tsh, port->membase + UART_TSH(port)); in mvebu_uart_resume()[all …]
