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Searched refs:msm_gpu (Results 1 – 25 of 27) sorted by relevance

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/Linux-v4.19/drivers/gpu/drm/msm/
Dmsm_gpu.h55 int (*get_param)(struct msm_gpu *gpu, uint32_t param, uint64_t *value);
56 int (*hw_init)(struct msm_gpu *gpu);
57 int (*pm_suspend)(struct msm_gpu *gpu);
58 int (*pm_resume)(struct msm_gpu *gpu);
59 void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit,
61 void (*flush)(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
62 irqreturn_t (*irq)(struct msm_gpu *irq);
63 struct msm_ringbuffer *(*active_ring)(struct msm_gpu *gpu);
64 void (*recover)(struct msm_gpu *gpu);
65 void (*destroy)(struct msm_gpu *gpu);
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Dmsm_gpu.c36 struct msm_gpu *gpu = platform_get_drvdata(to_platform_device(dev)); in msm_devfreq_target()
53 struct msm_gpu *gpu = platform_get_drvdata(to_platform_device(dev)); in msm_devfreq_get_dev_status()
74 struct msm_gpu *gpu = platform_get_drvdata(to_platform_device(dev)); in msm_devfreq_get_cur_freq()
88 static void msm_devfreq_init(struct msm_gpu *gpu) in msm_devfreq_init()
110 static int enable_pwrrail(struct msm_gpu *gpu) in enable_pwrrail()
134 static int disable_pwrrail(struct msm_gpu *gpu) in disable_pwrrail()
143 static int enable_clk(struct msm_gpu *gpu) in enable_clk()
155 static int disable_clk(struct msm_gpu *gpu) in disable_clk()
173 static int enable_axi(struct msm_gpu *gpu) in enable_axi()
180 static int disable_axi(struct msm_gpu *gpu) in disable_axi()
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Dmsm_ringbuffer.h32 struct msm_gpu *gpu;
46 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
Dmsm_debugfs.c35 struct msm_gpu *gpu = priv->gpu; in msm_gpu_show()
55 struct msm_gpu *gpu = priv->gpu; in msm_gpu_release()
74 struct msm_gpu *gpu = priv->gpu; in msm_gpu_open()
117 struct msm_gpu *gpu = priv->gpu; in msm_gem_show()
Dmsm_gem.h70 struct msm_gpu *gpu; /* non-null if active */
140 struct msm_gpu *gpu;
Dmsm_perf.c69 struct msm_gpu *gpu = priv->gpu; in refill_buf()
163 struct msm_gpu *gpu = priv->gpu; in perf_open()
Dmsm_mmu.h48 struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu);
Dmsm_drv.h49 struct msm_gpu;
178 struct msm_gpu *gpu;
296 struct msm_gpu *gpu, bool exclusive, struct dma_fence *fence);
Dmsm_ringbuffer.c21 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id, in msm_ringbuffer_new()
Dmsm_gem_submit.c34 struct msm_gpu *gpu, struct msm_gpu_submitqueue *queue, in submit_create()
412 struct msm_gpu *gpu = priv->gpu; in msm_ioctl_gem_submit()
DMakefile89 msm_gpu.o \
Dmsm_rd.c185 struct msm_gpu *gpu = priv->gpu; in rd_open()
DNOTES27 And one or more 'struct msm_gpu' for the various different gpu sub-
/Linux-v4.19/drivers/gpu/drm/msm/adreno/
Da5xx_gpu.h53 int a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor);
136 int a5xx_power_init(struct msm_gpu *gpu);
137 void a5xx_gpmu_ucode_init(struct msm_gpu *gpu);
139 static inline int spin_usecs(struct msm_gpu *gpu, uint32_t usecs, in spin_usecs()
152 bool a5xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
153 void a5xx_set_hwcg(struct msm_gpu *gpu, bool state);
155 void a5xx_preempt_init(struct msm_gpu *gpu);
156 void a5xx_preempt_hw_init(struct msm_gpu *gpu);
157 void a5xx_preempt_trigger(struct msm_gpu *gpu);
158 void a5xx_preempt_irq(struct msm_gpu *gpu);
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Dadreno_gpu.h77 int (*get_timestamp)(struct msm_gpu *gpu, uint64_t *value);
87 struct msm_gpu *(*init)(struct drm_device *dev);
95 struct msm_gpu base;
209 int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value);
212 struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu,
214 int adreno_hw_init(struct msm_gpu *gpu);
215 void adreno_recover(struct msm_gpu *gpu);
216 void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,
218 void adreno_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
219 bool adreno_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
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Da5xx_gpu.c30 static void a5xx_dump(struct msm_gpu *gpu);
34 static int zap_shader_load_mdt(struct msm_gpu *gpu, const char *fwname) in zap_shader_load_mdt()
122 static void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a5xx_flush()
147 static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit, in a5xx_submit_in_rb()
206 static void a5xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, in a5xx_submit()
411 void a5xx_set_hwcg(struct msm_gpu *gpu, bool state) in a5xx_set_hwcg()
423 static int a5xx_me_init(struct msm_gpu *gpu) in a5xx_me_init()
461 static int a5xx_preempt_start(struct msm_gpu *gpu) in a5xx_preempt_start()
504 static int a5xx_ucode_init(struct msm_gpu *gpu) in a5xx_ucode_init()
547 static int a5xx_zap_shader_resume(struct msm_gpu *gpu) in a5xx_zap_shader_resume()
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Da4xx_gpu.c34 static void a4xx_dump(struct msm_gpu *gpu);
35 static bool a4xx_idle(struct msm_gpu *gpu);
41 static void a4xx_enable_hwcg(struct msm_gpu *gpu) in a4xx_enable_hwcg()
118 static bool a4xx_me_init(struct msm_gpu *gpu) in a4xx_me_init()
145 static int a4xx_hw_init(struct msm_gpu *gpu) in a4xx_hw_init()
300 static void a4xx_recover(struct msm_gpu *gpu) in a4xx_recover()
321 static void a4xx_destroy(struct msm_gpu *gpu) in a4xx_destroy()
338 static bool a4xx_idle(struct msm_gpu *gpu) in a4xx_idle()
355 static irqreturn_t a4xx_irq(struct msm_gpu *gpu) in a4xx_irq()
458 static struct msm_gpu_state *a4xx_gpu_state_get(struct msm_gpu *gpu) in a4xx_gpu_state_get()
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Da6xx_gpu.c10 static inline bool _a6xx_check_idle(struct msm_gpu *gpu) in _a6xx_check_idle()
28 bool a6xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a6xx_idle()
47 static void a6xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a6xx_flush()
68 static void a6xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, in a6xx_submit()
227 static void a6xx_set_hwcg(struct msm_gpu *gpu, bool state) in a6xx_set_hwcg()
254 static int a6xx_cp_init(struct msm_gpu *gpu) in a6xx_cp_init()
283 static int a6xx_ucode_init(struct msm_gpu *gpu) in a6xx_ucode_init()
321 static int a6xx_hw_init(struct msm_gpu *gpu) in a6xx_hw_init()
482 static void a6xx_dump(struct msm_gpu *gpu) in a6xx_dump()
492 static void a6xx_recover(struct msm_gpu *gpu) in a6xx_recover()
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Da5xx_debugfs.c21 static int pfp_print(struct msm_gpu *gpu, struct drm_printer *p) in pfp_print()
36 static int me_print(struct msm_gpu *gpu, struct drm_printer *p) in me_print()
51 static int meq_print(struct msm_gpu *gpu, struct drm_printer *p) in meq_print()
66 static int roq_print(struct msm_gpu *gpu, struct drm_printer *p) in roq_print()
91 int (*show)(struct msm_gpu *gpu, struct drm_printer *p) = in show()
111 struct msm_gpu *gpu = priv->gpu; in reset_set()
160 int a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor) in a5xx_debugfs_init()
Da5xx_preempt.c49 static inline void update_wptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_wptr()
65 static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu) in get_next_ring()
88 struct msm_gpu *gpu = &a5xx_gpu->base.base; in a5xx_preempt_timer()
100 void a5xx_preempt_trigger(struct msm_gpu *gpu) in a5xx_preempt_trigger()
168 void a5xx_preempt_irq(struct msm_gpu *gpu) in a5xx_preempt_irq()
205 void a5xx_preempt_hw_init(struct msm_gpu *gpu) in a5xx_preempt_hw_init()
232 struct msm_gpu *gpu = &adreno_gpu->base; in preempt_init_ring()
260 void a5xx_preempt_fini(struct msm_gpu *gpu) in a5xx_preempt_fini()
280 void a5xx_preempt_init(struct msm_gpu *gpu) in a5xx_preempt_init()
Da3xx_gpu.c43 static void a3xx_dump(struct msm_gpu *gpu);
44 static bool a3xx_idle(struct msm_gpu *gpu);
46 static bool a3xx_me_init(struct msm_gpu *gpu) in a3xx_me_init()
73 static int a3xx_hw_init(struct msm_gpu *gpu) in a3xx_hw_init()
302 static void a3xx_recover(struct msm_gpu *gpu) in a3xx_recover()
323 static void a3xx_destroy(struct msm_gpu *gpu) in a3xx_destroy()
340 static bool a3xx_idle(struct msm_gpu *gpu) in a3xx_idle()
358 static irqreturn_t a3xx_irq(struct msm_gpu *gpu) in a3xx_irq()
415 static void a3xx_dump(struct msm_gpu *gpu) in a3xx_dump()
422 static struct msm_gpu_state *a3xx_gpu_state_get(struct msm_gpu *gpu) in a3xx_gpu_state_get()
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Da5xx_power.c100 static inline uint32_t _get_mvolts(struct msm_gpu *gpu, uint32_t freq) in _get_mvolts()
119 static void a5xx_lm_setup(struct msm_gpu *gpu) in a5xx_lm_setup()
169 static void a5xx_pc_init(struct msm_gpu *gpu) in a5xx_pc_init()
178 static int a5xx_gpmu_init(struct msm_gpu *gpu) in a5xx_gpmu_init()
227 static void a5xx_lm_enable(struct msm_gpu *gpu) in a5xx_lm_enable()
238 int a5xx_power_init(struct msm_gpu *gpu) in a5xx_power_init()
259 void a5xx_gpmu_ucode_init(struct msm_gpu *gpu) in a5xx_gpmu_ucode_init()
Dadreno_gpu.c28 int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value) in adreno_get_param()
176 struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu, in adreno_fw_create_bo()
195 int adreno_hw_init(struct msm_gpu *gpu) in adreno_hw_init()
262 struct msm_ringbuffer *adreno_active_ring(struct msm_gpu *gpu) in adreno_active_ring()
267 void adreno_recover(struct msm_gpu *gpu) in adreno_recover()
285 void adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit, in adreno_submit()
345 void adreno_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in adreno_flush()
366 bool adreno_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in adreno_idle()
382 int adreno_gpu_state_get(struct msm_gpu *gpu, struct msm_gpu_state *state) in adreno_gpu_state_get()
510 void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state, in adreno_show()
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Dadreno_device.c165 struct msm_gpu *adreno_load_gpu(struct drm_device *dev) in adreno_load_gpu()
169 struct msm_gpu *gpu = NULL; in adreno_load_gpu()
276 struct msm_gpu *gpu; in adreno_bind()
312 struct msm_gpu *gpu = dev_get_drvdata(dev); in adreno_unbind()
348 struct msm_gpu *gpu = platform_get_drvdata(pdev); in adreno_resume()
356 struct msm_gpu *gpu = platform_get_drvdata(pdev); in adreno_suspend()
Da6xx_gmu.c971 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_rpmh_votes_init()
1031 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_pwrlevels_probe()

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