Home
last modified time | relevance | path

Searched refs:mpll_param (Results 1 – 14 of 14) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/powerplay/hwmgr/
Dppatomctrl.c250 pp_atomctrl_memory_clock_param *mpll_param, in atomctrl_get_memory_pll_dividers_si() argument
265 mpll_param->mpll_fb_divider.clk_frac = in atomctrl_get_memory_pll_dividers_si()
267 mpll_param->mpll_fb_divider.cl_kf = in atomctrl_get_memory_pll_dividers_si()
269 mpll_param->mpll_post_divider = in atomctrl_get_memory_pll_dividers_si()
271 mpll_param->vco_mode = in atomctrl_get_memory_pll_dividers_si()
274 mpll_param->yclk_sel = in atomctrl_get_memory_pll_dividers_si()
277 mpll_param->qdr = in atomctrl_get_memory_pll_dividers_si()
280 mpll_param->half_rate = in atomctrl_get_memory_pll_dividers_si()
283 mpll_param->dll_speed = in atomctrl_get_memory_pll_dividers_si()
285 mpll_param->bw_ctrl = in atomctrl_get_memory_pll_dividers_si()
[all …]
Dppatomctrl.h299 …pp_hwmgr *hwmgr, uint32_t clock_value, pp_atomctrl_memory_clock_param *mpll_param, bool strobe_mod…
305 uint32_t clock_value, pp_atomctrl_memory_clock_param *mpll_param);
307 uint32_t clock_value, pp_atomctrl_memory_clock_param_ai *mpll_param);
/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Damdgpu_atombios.c1104 struct atom_mpll_param *mpll_param) in amdgpu_atombios_get_memory_pll_dividers() argument
1111 memset(mpll_param, 0, sizeof(struct atom_mpll_param)); in amdgpu_atombios_get_memory_pll_dividers()
1128 mpll_param->clkfrac = le16_to_cpu(args.ulFbDiv.usFbDivFrac); in amdgpu_atombios_get_memory_pll_dividers()
1129 mpll_param->clkf = le16_to_cpu(args.ulFbDiv.usFbDiv); in amdgpu_atombios_get_memory_pll_dividers()
1130 mpll_param->post_div = args.ucPostDiv; in amdgpu_atombios_get_memory_pll_dividers()
1131 mpll_param->dll_speed = args.ucDllSpeed; in amdgpu_atombios_get_memory_pll_dividers()
1132 mpll_param->bwcntl = args.ucBWCntl; in amdgpu_atombios_get_memory_pll_dividers()
1133 mpll_param->vco_mode = in amdgpu_atombios_get_memory_pll_dividers()
1135 mpll_param->yclk_sel = in amdgpu_atombios_get_memory_pll_dividers()
1137 mpll_param->qdr = in amdgpu_atombios_get_memory_pll_dividers()
[all …]
Damdgpu_atombios.h166 struct atom_mpll_param *mpll_param);
Dci_dpm.c2940 struct atom_mpll_param mpll_param; in ci_calculate_mclk_params() local
2943 ret = amdgpu_atombios_get_memory_pll_dividers(adev, memory_clock, strobe_mode, &mpll_param); in ci_calculate_mclk_params()
2948 mpll_func_cntl |= (mpll_param.bwcntl << MPLL_FUNC_CNTL__BWCTRL__SHIFT); in ci_calculate_mclk_params()
2952 mpll_func_cntl_1 |= (mpll_param.clkf) << MPLL_FUNC_CNTL_1__CLKF__SHIFT | in ci_calculate_mclk_params()
2953 (mpll_param.clkfrac << MPLL_FUNC_CNTL_1__CLKFRAC__SHIFT) | in ci_calculate_mclk_params()
2954 (mpll_param.vco_mode << MPLL_FUNC_CNTL_1__VCO_MODE__SHIFT); in ci_calculate_mclk_params()
2957 mpll_ad_func_cntl |= (mpll_param.post_div << MPLL_AD_FUNC_CNTL__YCLK_POST_DIV__SHIFT); in ci_calculate_mclk_params()
2962 mpll_dq_func_cntl |= (mpll_param.yclk_sel << MPLL_DQ_FUNC_CNTL__YCLK_SEL__SHIFT) | in ci_calculate_mclk_params()
2963 (mpll_param.post_div << MPLL_AD_FUNC_CNTL__YCLK_POST_DIV__SHIFT); in ci_calculate_mclk_params()
2972 if (mpll_param.qdr == 1) in ci_calculate_mclk_params()
[all …]
Dsi_dpm.c5352 struct atom_mpll_param mpll_param; in si_populate_mclk_value() local
5355 ret = amdgpu_atombios_get_memory_pll_dividers(adev, memory_clock, strobe_mode, &mpll_param); in si_populate_mclk_value()
5360 mpll_func_cntl |= BWCTRL(mpll_param.bwcntl); in si_populate_mclk_value()
5363 mpll_func_cntl_1 |= CLKF(mpll_param.clkf) | in si_populate_mclk_value()
5364 CLKFRAC(mpll_param.clkfrac) | VCO_MODE(mpll_param.vco_mode); in si_populate_mclk_value()
5367 mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
5371 mpll_dq_func_cntl |= YCLK_SEL(mpll_param.yclk_sel) | in si_populate_mclk_value()
5372 YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
5402 mclk_pwrmgt_cntl |= DLL_SPEED(mpll_param.dll_speed); in si_populate_mclk_value()
/Linux-v4.19/drivers/gpu/drm/amd/powerplay/smumgr/
Diceland_smumgr.c1064 pp_atomctrl_memory_clock_param mpll_param; in iceland_calculate_mclk_params() local
1068 memory_clock, &mpll_param, strobe_mode); in iceland_calculate_mclk_params()
1073 mpll_func_cntl = PHM_SET_FIELD(mpll_func_cntl, MPLL_FUNC_CNTL, BWCTRL, mpll_param.bw_ctrl); in iceland_calculate_mclk_params()
1077 MPLL_FUNC_CNTL_1, CLKF, mpll_param.mpll_fb_divider.cl_kf); in iceland_calculate_mclk_params()
1079 MPLL_FUNC_CNTL_1, CLKFRAC, mpll_param.mpll_fb_divider.clk_frac); in iceland_calculate_mclk_params()
1081 MPLL_FUNC_CNTL_1, VCO_MODE, mpll_param.vco_mode); in iceland_calculate_mclk_params()
1085 MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in iceland_calculate_mclk_params()
1090 MPLL_DQ_FUNC_CNTL, YCLK_SEL, mpll_param.yclk_sel); in iceland_calculate_mclk_params()
1092 MPLL_DQ_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in iceland_calculate_mclk_params()
1118 if (1 == mpll_param.qdr) in iceland_calculate_mclk_params()
[all …]
Dci_smumgr.c1039 pp_atomctrl_memory_clock_param mpll_param; in ci_calculate_mclk_params() local
1043 memory_clock, &mpll_param, strobe_mode); in ci_calculate_mclk_params()
1047 mpll_func_cntl = PHM_SET_FIELD(mpll_func_cntl, MPLL_FUNC_CNTL, BWCTRL, mpll_param.bw_ctrl); in ci_calculate_mclk_params()
1050 MPLL_FUNC_CNTL_1, CLKF, mpll_param.mpll_fb_divider.cl_kf); in ci_calculate_mclk_params()
1052 MPLL_FUNC_CNTL_1, CLKFRAC, mpll_param.mpll_fb_divider.clk_frac); in ci_calculate_mclk_params()
1054 MPLL_FUNC_CNTL_1, VCO_MODE, mpll_param.vco_mode); in ci_calculate_mclk_params()
1057 MPLL_AD_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in ci_calculate_mclk_params()
1061 MPLL_DQ_FUNC_CNTL, YCLK_SEL, mpll_param.yclk_sel); in ci_calculate_mclk_params()
1063 MPLL_DQ_FUNC_CNTL, YCLK_POST_DIV, mpll_param.mpll_post_divider); in ci_calculate_mclk_params()
1074 if (1 == mpll_param.qdr) in ci_calculate_mclk_params()
[all …]
Dtonga_smumgr.c797 pp_atomctrl_memory_clock_param mpll_param; in tonga_calculate_mclk_params() local
801 memory_clock, &mpll_param, strobe_mode); in tonga_calculate_mclk_params()
809 mpll_param.bw_ctrl); in tonga_calculate_mclk_params()
814 mpll_param.mpll_fb_divider.cl_kf); in tonga_calculate_mclk_params()
817 mpll_param.mpll_fb_divider.clk_frac); in tonga_calculate_mclk_params()
820 mpll_param.vco_mode); in tonga_calculate_mclk_params()
825 mpll_param.mpll_post_divider); in tonga_calculate_mclk_params()
831 mpll_param.yclk_sel); in tonga_calculate_mclk_params()
834 mpll_param.mpll_post_divider); in tonga_calculate_mclk_params()
860 if (1 == mpll_param.qdr) in tonga_calculate_mclk_params()
[all …]
Dvegam_smumgr.c964 struct pp_atomctrl_memory_clock_param_ai mpll_param; in vegam_calculate_mclk_params() local
967 clock, &mpll_param), in vegam_calculate_mclk_params()
971 mem_level->MclkFrequency = (uint32_t)mpll_param.ulClock; in vegam_calculate_mclk_params()
972 mem_level->Fcw_int = (uint16_t)mpll_param.ulMclk_fcw_int; in vegam_calculate_mclk_params()
973 mem_level->Fcw_frac = (uint16_t)mpll_param.ulMclk_fcw_frac; in vegam_calculate_mclk_params()
974 mem_level->Postdiv = (uint8_t)mpll_param.ulPostDiv; in vegam_calculate_mclk_params()
/Linux-v4.19/drivers/gpu/drm/radeon/
Dradeon_atombios.c2954 struct atom_mpll_param *mpll_param) in radeon_atom_get_memory_pll_dividers() argument
2961 memset(mpll_param, 0, sizeof(struct atom_mpll_param)); in radeon_atom_get_memory_pll_dividers()
2978 mpll_param->clkfrac = le16_to_cpu(args.ulFbDiv.usFbDivFrac); in radeon_atom_get_memory_pll_dividers()
2979 mpll_param->clkf = le16_to_cpu(args.ulFbDiv.usFbDiv); in radeon_atom_get_memory_pll_dividers()
2980 mpll_param->post_div = args.ucPostDiv; in radeon_atom_get_memory_pll_dividers()
2981 mpll_param->dll_speed = args.ucDllSpeed; in radeon_atom_get_memory_pll_dividers()
2982 mpll_param->bwcntl = args.ucBWCntl; in radeon_atom_get_memory_pll_dividers()
2983 mpll_param->vco_mode = in radeon_atom_get_memory_pll_dividers()
2985 mpll_param->yclk_sel = in radeon_atom_get_memory_pll_dividers()
2987 mpll_param->qdr = in radeon_atom_get_memory_pll_dividers()
[all …]
Dci_dpm.c2802 struct atom_mpll_param mpll_param; in ci_calculate_mclk_params() local
2805 ret = radeon_atom_get_memory_pll_dividers(rdev, memory_clock, strobe_mode, &mpll_param); in ci_calculate_mclk_params()
2810 mpll_func_cntl |= BWCTRL(mpll_param.bwcntl); in ci_calculate_mclk_params()
2813 mpll_func_cntl_1 |= CLKF(mpll_param.clkf) | in ci_calculate_mclk_params()
2814 CLKFRAC(mpll_param.clkfrac) | VCO_MODE(mpll_param.vco_mode); in ci_calculate_mclk_params()
2817 mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div); in ci_calculate_mclk_params()
2821 mpll_dq_func_cntl |= YCLK_SEL(mpll_param.yclk_sel) | in ci_calculate_mclk_params()
2822 YCLK_POST_DIV(mpll_param.post_div); in ci_calculate_mclk_params()
2831 if (mpll_param.qdr == 1) in ci_calculate_mclk_params()
2832 freq_nom = memory_clock * 4 * (1 << mpll_param.post_div); in ci_calculate_mclk_params()
[all …]
Dsi_dpm.c4888 struct atom_mpll_param mpll_param; in si_populate_mclk_value() local
4891 ret = radeon_atom_get_memory_pll_dividers(rdev, memory_clock, strobe_mode, &mpll_param); in si_populate_mclk_value()
4896 mpll_func_cntl |= BWCTRL(mpll_param.bwcntl); in si_populate_mclk_value()
4899 mpll_func_cntl_1 |= CLKF(mpll_param.clkf) | in si_populate_mclk_value()
4900 CLKFRAC(mpll_param.clkfrac) | VCO_MODE(mpll_param.vco_mode); in si_populate_mclk_value()
4903 mpll_ad_func_cntl |= YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
4907 mpll_dq_func_cntl |= YCLK_SEL(mpll_param.yclk_sel) | in si_populate_mclk_value()
4908 YCLK_POST_DIV(mpll_param.post_div); in si_populate_mclk_value()
4938 mclk_pwrmgt_cntl |= DLL_SPEED(mpll_param.dll_speed); in si_populate_mclk_value()
Dradeon.h298 struct atom_mpll_param *mpll_param);