Lines Matching refs:mpll_param
2940 struct atom_mpll_param mpll_param; in ci_calculate_mclk_params() local
2943 ret = amdgpu_atombios_get_memory_pll_dividers(adev, memory_clock, strobe_mode, &mpll_param); in ci_calculate_mclk_params()
2948 mpll_func_cntl |= (mpll_param.bwcntl << MPLL_FUNC_CNTL__BWCTRL__SHIFT); in ci_calculate_mclk_params()
2952 mpll_func_cntl_1 |= (mpll_param.clkf) << MPLL_FUNC_CNTL_1__CLKF__SHIFT | in ci_calculate_mclk_params()
2953 (mpll_param.clkfrac << MPLL_FUNC_CNTL_1__CLKFRAC__SHIFT) | in ci_calculate_mclk_params()
2954 (mpll_param.vco_mode << MPLL_FUNC_CNTL_1__VCO_MODE__SHIFT); in ci_calculate_mclk_params()
2957 mpll_ad_func_cntl |= (mpll_param.post_div << MPLL_AD_FUNC_CNTL__YCLK_POST_DIV__SHIFT); in ci_calculate_mclk_params()
2962 mpll_dq_func_cntl |= (mpll_param.yclk_sel << MPLL_DQ_FUNC_CNTL__YCLK_SEL__SHIFT) | in ci_calculate_mclk_params()
2963 (mpll_param.post_div << MPLL_AD_FUNC_CNTL__YCLK_POST_DIV__SHIFT); in ci_calculate_mclk_params()
2972 if (mpll_param.qdr == 1) in ci_calculate_mclk_params()
2973 freq_nom = memory_clock * 4 * (1 << mpll_param.post_div); in ci_calculate_mclk_params()
2975 freq_nom = memory_clock * 2 * (1 << mpll_param.post_div); in ci_calculate_mclk_params()
2993 mclk_pwrmgt_cntl |= (mpll_param.dll_speed << MCLK_PWRMGT_CNTL__DLL_SPEED__SHIFT); in ci_calculate_mclk_params()