Searched refs:mpixelclock (Results 1 – 4 of 4) sorted by relevance
24 unsigned long mpixelclock; member44 unsigned long mpixelclock) in rcar_hdmi_phy_configure() argument48 for (; params->mpixelclock != ~0UL; ++params) { in rcar_hdmi_phy_configure()49 if (mpixelclock <= params->mpixelclock) in rcar_hdmi_phy_configure()53 if (params->mpixelclock == ~0UL) in rcar_hdmi_phy_configure()
96 unsigned long mpixelclock; member104 unsigned long mpixelclock; member109 unsigned long mpixelclock; member143 unsigned long mpixelclock);
93 unsigned int mpixelclock; member127 unsigned long mpixelclock);540 hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock, in hdmi_clk_regenerator_update_pixel_clock()549 hdmi_set_clk_regenerator(hdmi, hdmi->hdmi_data.video_mode.mpixelclock, in dw_hdmi_set_sample_rate()1162 unsigned long mpixelclock) in hdmi_phy_configure_dwc_hdmi_3d_tx() argument1169 for (; mpll_config->mpixelclock != ~0UL; mpll_config++) in hdmi_phy_configure_dwc_hdmi_3d_tx()1170 if (mpixelclock <= mpll_config->mpixelclock) in hdmi_phy_configure_dwc_hdmi_3d_tx()1173 for (; curr_ctrl->mpixelclock != ~0UL; curr_ctrl++) in hdmi_phy_configure_dwc_hdmi_3d_tx()1174 if (mpixelclock <= curr_ctrl->mpixelclock) in hdmi_phy_configure_dwc_hdmi_3d_tx()1177 for (; phy_config->mpixelclock != ~0UL; phy_config++) in hdmi_phy_configure_dwc_hdmi_3d_tx()[all …]
207 for (i = 0; mpll_cfg[i].mpixelclock != (~0UL); i++) { in dw_hdmi_rockchip_mode_valid()208 if (pclk == mpll_cfg[i].mpixelclock) { in dw_hdmi_rockchip_mode_valid()
