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Searched refs:midr (Results 1 – 14 of 14) sorted by relevance

/Linux-v4.19/arch/arm64/include/asm/
Dcputype.h36 #define MIDR_REVISION(midr) ((midr) & MIDR_REVISION_MASK) argument
39 #define MIDR_PARTNUM(midr) \ argument
40 (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
43 #define MIDR_ARCHITECTURE(midr) \ argument
44 (((midr) & MIDR_ARCHITECTURE_MASK) >> MIDR_ARCHITECTURE_SHIFT)
47 #define MIDR_VARIANT(midr) \ argument
48 (((midr) & MIDR_VARIANT_MASK) >> MIDR_VARIANT_SHIFT)
51 #define MIDR_IMPLEMENTOR(midr) \ argument
52 (((midr) & MIDR_IMPLEMENTOR_MASK) >> MIDR_IMPLEMENTOR_SHIFT)
65 #define MIDR_IS_CPU_MODEL_RANGE(midr, model, rv_min, rv_max) \ argument
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/Linux-v4.19/arch/arm/kernel/
Dsmp_tlb.c99 unsigned int midr = read_cpuid_id(); in erratum_a15_798181_init() local
128 if ((midr & 0xff0ffff0) == 0x420f00f0 && midr <= 0x420f00f2) { in erratum_a15_798181_init()
130 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f2) { in erratum_a15_798181_init()
132 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x412fc0f4) { in erratum_a15_798181_init()
139 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x413fc0f3) { in erratum_a15_798181_init()
146 } else if ((midr & 0xff0ffff0) == 0x410fc0f0 && midr < 0x414fc0f0) { in erratum_a15_798181_init()
/Linux-v4.19/tools/perf/arch/arm64/util/
Dheader.c18 u64 midr = 0; in get_cpuid_str() local
50 midr = strtoul(buf, NULL, 16); in get_cpuid_str()
51 midr &= (~(MIDR_VARIANT_MASK | MIDR_REVISION_MASK)); in get_cpuid_str()
52 scnprintf(buf, MIDR_SIZE, "0x%016lx", midr); in get_cpuid_str()
57 if (!midr) { in get_cpuid_str()
/Linux-v4.19/arch/arm64/kernel/
Dcpuinfo.c131 u32 midr = cpuinfo->reg_midr; in c_show() local
141 MIDR_REVISION(midr), COMPAT_ELF_PLATFORM); in c_show()
172 MIDR_IMPLEMENTOR(midr)); in c_show()
174 seq_printf(m, "CPU variant\t: 0x%x\n", MIDR_VARIANT(midr)); in c_show()
175 seq_printf(m, "CPU part\t: 0x%03x\n", MIDR_PARTNUM(midr)); in c_show()
176 seq_printf(m, "CPU revision\t: %d\n\n", MIDR_REVISION(midr)); in c_show()
234 CPUREGS_ATTR_RO(midr_el1, midr);
Dcpu_errata.c30 u32 midr = read_cpuid_id(), revidr; in is_affected_midr_range() local
33 if (!is_midr_in_range(midr, &entry->midr_range)) in is_affected_midr_range()
36 midr &= MIDR_REVISION_MASK | MIDR_VARIANT_MASK; in is_affected_midr_range()
39 if (midr == fix->midr_rv && (revidr & fix->revidr_mask)) in is_affected_midr_range()
198 u32 midr = read_cpuid_id(); in enable_smccc_arch_workaround_1() local
232 if (((midr & MIDR_CPU_MODEL_MASK) == MIDR_QCOM_FALKOR) || in enable_smccc_arch_workaround_1()
233 ((midr & MIDR_CPU_MODEL_MASK) == MIDR_QCOM_FALKOR_V1)) in enable_smccc_arch_workaround_1()
Dcpufeature.c834 u32 midr = read_cpuid_id(); in has_no_hw_prefetch() local
837 return MIDR_IS_CPU_MODEL_RANGE(midr, MIDR_THUNDERX, in has_no_hw_prefetch()
/Linux-v4.19/include/ras/
Dras_event.h179 __field(u64, midr)
194 __entry->midr = proc->midr;
206 __entry->affinity, __entry->mpidr, __entry->midr,
/Linux-v4.19/arch/arm/kvm/
Dreset.c60 vcpu->arch.midr = read_cpuid_id(); in kvm_reset_vcpu()
/Linux-v4.19/arch/c6x/platforms/
Demif.c20 u32 midr; member
/Linux-v4.19/arch/arm/kvm/hyp/
Dswitch.c81 write_sysreg(vcpu->arch.midr, VPIDR); in __activate_vm()
/Linux-v4.19/drivers/firmware/efi/
Dcper-arm.c258 printk("%sMIDR: 0x%016llx\n", pfx, proc->midr); in cper_print_proc_arm()
/Linux-v4.19/arch/arm/include/asm/
Dkvm_host.h157 u32 midr; member
/Linux-v4.19/include/linux/
Dcper.h416 __u64 midr; member
/Linux-v4.19/Documentation/arm64/
Dcpu-feature-registers.txt76 \- midr