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/Linux-v4.19/drivers/gpu/drm/radeon/
Drv730_dpm.c247 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
248 table->ACPIState.levels[0].gen2PCIE = pi->pcie_gen2 ? in rv730_populate_smc_acpi_state()
250 table->ACPIState.levels[0].gen2XSP = in rv730_populate_smc_acpi_state()
254 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
255 table->ACPIState.levels[0].gen2PCIE = 0; in rv730_populate_smc_acpi_state()
297 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_smc_acpi_state()
298 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL2 = cpu_to_be32(mpll_func_cntl_2); in rv730_populate_smc_acpi_state()
299 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL3 = cpu_to_be32(mpll_func_cntl_3); in rv730_populate_smc_acpi_state()
300 table->ACPIState.levels[0].mclk.mclk730.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv730_populate_smc_acpi_state()
301 table->ACPIState.levels[0].mclk.mclk730.vDLL_CNTL = cpu_to_be32(dll_cntl); in rv730_populate_smc_acpi_state()
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Drv740_dpm.c335 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
336 table->ACPIState.levels[0].gen2PCIE = in rv740_populate_smc_acpi_state()
339 table->ACPIState.levels[0].gen2XSP = in rv740_populate_smc_acpi_state()
343 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
344 table->ACPIState.levels[0].gen2PCIE = 0; in rv740_populate_smc_acpi_state()
374 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl); in rv740_populate_smc_acpi_state()
375 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2); in rv740_populate_smc_acpi_state()
376 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl); in rv740_populate_smc_acpi_state()
377 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2); in rv740_populate_smc_acpi_state()
378 table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl); in rv740_populate_smc_acpi_state()
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Dcypress_dpm.c775 &smc_state->levels[0], in cypress_convert_power_state_to_smc()
782 &smc_state->levels[1], in cypress_convert_power_state_to_smc()
789 &smc_state->levels[2], in cypress_convert_power_state_to_smc()
794 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in cypress_convert_power_state_to_smc()
795 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in cypress_convert_power_state_to_smc()
796 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in cypress_convert_power_state_to_smc()
799 smc_state->levels[0].ACIndex = 2; in cypress_convert_power_state_to_smc()
800 smc_state->levels[1].ACIndex = 3; in cypress_convert_power_state_to_smc()
801 smc_state->levels[2].ACIndex = 4; in cypress_convert_power_state_to_smc()
803 smc_state->levels[0].ACIndex = 0; in cypress_convert_power_state_to_smc()
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Dsumo_dpm.c348 u32 highest_engine_clock = ps->levels[ps->num_levels - 1].sclk; in sumo_program_bsp()
412 m_a = asi * ps->levels[i].sclk / 100; in sumo_program_at()
671 pi->boost_pl = new_ps->levels[new_ps->num_levels - 1]; in sumo_patch_boost_state()
763 sumo_program_power_level(rdev, &new_ps->levels[i], i); in sumo_program_power_levels_0_to_n()
845 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in sumo_set_uvd_clock_before_set_eng_clock()
846 current_ps->levels[current_ps->num_levels - 1].sclk) in sumo_set_uvd_clock_before_set_eng_clock()
863 if (new_ps->levels[new_ps->num_levels - 1].sclk < in sumo_set_uvd_clock_after_set_eng_clock()
864 current_ps->levels[current_ps->num_levels - 1].sclk) in sumo_set_uvd_clock_after_set_eng_clock()
1054 current_vddc = current_ps->levels[current_index].vddc_index; in sumo_patch_thermal_state()
1055 current_sclk = current_ps->levels[current_index].sclk; in sumo_patch_thermal_state()
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Drv770_dpm.c290 smc_state->levels[i].aT = cpu_to_be32(a_t); in rv770_populate_smc_t()
296 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].aT = in rv770_populate_smc_t()
310 smc_state->levels[i].bSP = cpu_to_be32(pi->dsp); in rv770_populate_smc_sp()
312 smc_state->levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1].bSP = in rv770_populate_smc_sp()
686 &smc_state->levels[0], in rv770_convert_power_state_to_smc()
693 &smc_state->levels[1], in rv770_convert_power_state_to_smc()
700 &smc_state->levels[2], in rv770_convert_power_state_to_smc()
705 smc_state->levels[0].arbValue = MC_CG_ARB_FREQ_F1; in rv770_convert_power_state_to_smc()
706 smc_state->levels[1].arbValue = MC_CG_ARB_FREQ_F2; in rv770_convert_power_state_to_smc()
707 smc_state->levels[2].arbValue = MC_CG_ARB_FREQ_F3; in rv770_convert_power_state_to_smc()
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Dtrinity_dpm.c848 trinity_program_power_level(rdev, &new_ps->levels[i], i); in trinity_program_power_levels_0_to_n()
968 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in trinity_set_uvd_clock_before_set_eng_clock()
969 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_before_set_eng_clock()
982 if (new_ps->levels[new_ps->num_levels - 1].sclk < in trinity_set_uvd_clock_after_set_eng_clock()
983 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_after_set_eng_clock()
1330 ps->levels[0] = pi->boot_pl; in trinity_patch_boot_state()
1353 pi->current_ps.levels[0] = pi->boot_pl; in trinity_construct_boot_state()
1408 current_vddc = current_ps->levels[current_index].vddc_index; in trinity_patch_thermal_state()
1409 current_sclk = current_ps->levels[current_index].sclk; in trinity_patch_thermal_state()
1415 ps->levels[0].vddc_index = current_vddc; in trinity_patch_thermal_state()
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Dni_dpm.c1690 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = in ni_populate_smc_initial_state()
1692 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 = in ni_populate_smc_initial_state()
1694 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = in ni_populate_smc_initial_state()
1696 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 = in ni_populate_smc_initial_state()
1698 table->initialState.levels[0].mclk.vMCLK_PWRMGT_CNTL = in ni_populate_smc_initial_state()
1700 table->initialState.levels[0].mclk.vDLL_CNTL = in ni_populate_smc_initial_state()
1702 table->initialState.levels[0].mclk.vMPLL_SS = in ni_populate_smc_initial_state()
1704 table->initialState.levels[0].mclk.vMPLL_SS2 = in ni_populate_smc_initial_state()
1706 table->initialState.levels[0].mclk.mclk_value = in ni_populate_smc_initial_state()
1709 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = in ni_populate_smc_initial_state()
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Dsi_dpm.c2315 smc_state->levels[0].dpm2.MaxPS = 0; in si_populate_power_containment_values()
2316 smc_state->levels[0].dpm2.NearTDPDec = 0; in si_populate_power_containment_values()
2317 smc_state->levels[0].dpm2.AboveSafeInc = 0; in si_populate_power_containment_values()
2318 smc_state->levels[0].dpm2.BelowSafeInc = 0; in si_populate_power_containment_values()
2319 smc_state->levels[0].dpm2.PwrEfficiencyRatio = 0; in si_populate_power_containment_values()
2369 …smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / ma… in si_populate_power_containment_values()
2370 smc_state->levels[i].dpm2.NearTDPDec = SISLANDS_DPM2_NEAR_TDP_DEC; in si_populate_power_containment_values()
2371 smc_state->levels[i].dpm2.AboveSafeInc = SISLANDS_DPM2_ABOVE_SAFE_INC; in si_populate_power_containment_values()
2372 smc_state->levels[i].dpm2.BelowSafeInc = SISLANDS_DPM2_BELOW_SAFE_INC; in si_populate_power_containment_values()
2373 smc_state->levels[i].dpm2.PwrEfficiencyRatio = cpu_to_be16(pwr_efficiency_ratio); in si_populate_power_containment_values()
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/Linux-v4.19/arch/powerpc/platforms/powernv/
Dpci-ioda-tce.c178 unsigned long size, unsigned int levels) in pnv_pci_ioda2_table_do_free_pages() argument
183 if (levels) { in pnv_pci_ioda2_table_do_free_pages()
194 levels - 1); in pnv_pci_ioda2_table_do_free_pages()
218 unsigned int levels, unsigned long limit, in pnv_pci_ioda2_table_do_alloc_pages() argument
229 --levels; in pnv_pci_ioda2_table_do_alloc_pages()
230 if (!levels) { in pnv_pci_ioda2_table_do_alloc_pages()
237 levels, limit, current_offset, total_allocated); in pnv_pci_ioda2_table_do_alloc_pages()
252 __u32 page_shift, __u64 window_size, __u32 levels, in pnv_pci_ioda2_table_alloc_pages() argument
263 unsigned int tmplevels = levels; in pnv_pci_ioda2_table_alloc_pages()
265 if (!levels || (levels > POWERNV_IOMMU_MAX_LEVELS)) in pnv_pci_ioda2_table_alloc_pages()
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/Linux-v4.19/arch/riscv/kernel/
Dcacheinfo.c38 int levels = 0, leaves = 0, level; in __init_cache_level() local
47 levels = 1; in __init_cache_level()
54 if (level <= levels) in __init_cache_level()
62 levels = level; in __init_cache_level()
65 this_cpu_ci->num_levels = levels; in __init_cache_level()
75 int levels = 1, level = 1; in __populate_cache_leaves() local
89 if (level <= levels) in __populate_cache_leaves()
97 levels = level; in __populate_cache_leaves()
/Linux-v4.19/drivers/video/backlight/
Dpwm_bl.c33 unsigned int *levels; member
94 if (pb->levels) in compute_duty_cycle()
95 duty_cycle = pb->levels[brightness]; in compute_duty_cycle()
225 data->levels = devm_kcalloc(dev, data->max_brightness, in pwm_backlight_brightness_default()
226 sizeof(*data->levels), GFP_KERNEL); in pwm_backlight_brightness_default()
227 if (!data->levels) in pwm_backlight_brightness_default()
238 data->levels[i] = (unsigned int)retval; in pwm_backlight_brightness_default()
277 size_t size = sizeof(*data->levels) * data->max_brightness; in pwm_backlight_parse_dt()
280 data->levels = devm_kzalloc(dev, size, GFP_KERNEL); in pwm_backlight_parse_dt()
281 if (!data->levels) in pwm_backlight_parse_dt()
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/Linux-v4.19/Documentation/arm64/
Dmemory.txt7 Linux kernel. The architecture allows up to 4 levels of translation
8 tables with a 4KB page size and up to 3 levels with a 64KB page size.
10 AArch64 Linux uses either 3 levels or 4 levels of translation tables
13 64KB pages, only 2 levels of translation tables, allowing 42-bit (4TB)
24 AArch64 Linux memory layout with 4KB pages + 3 levels:
32 AArch64 Linux memory layout with 4KB pages + 4 levels:
40 AArch64 Linux memory layout with 64KB pages + 2 levels:
48 AArch64 Linux memory layout with 64KB pages + 3 levels:
/Linux-v4.19/arch/mips/kernel/
Dcacheinfo.c35 int levels = 0, leaves = 0; in __init_cache_level() local
42 levels += 1; in __init_cache_level()
50 levels++; in __init_cache_level()
55 levels++; in __init_cache_level()
59 this_cpu_ci->num_levels = levels; in __init_cache_level()
/Linux-v4.19/Documentation/scheduler/
Dsched-nice-design.txt2 nice-levels implementation in the new Linux scheduler.
4 Nice levels were always pretty weak under Linux and people continuously
12 In the O(1) scheduler (in 2003) we changed negative nice levels to be
54 To sum it up: we always wanted to make nice levels more consistent, but
79 nice levels were not 'punchy enough', so lots of people had to resort to
86 To address the first complaint (of nice levels being not "punchy"
88 (and granularity was made a separate concept from nice levels) and thus
94 To address the second complaint (of nice levels not being consistent),
96 tasks, regardless of their absolute nice levels. So on the new
100 levels were changed to be "multiplicative" (or exponential) - that way
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/Linux-v4.19/Documentation/devicetree/bindings/leds/backlight/
Dpwm-backlight.txt17 - brightness-levels: Array of distinct brightness levels. Typically these
24 array defined by the "brightness-levels" property).
26 of brightness-levels table. This way a high
40 brightness-levels = <0 4 8 16 32 64 128 255>;
55 brightness-levels = <0 2048 4096 8192 16384 65535>;
/Linux-v4.19/drivers/acpi/
Dacpi_video.c245 if (vd->brightness->levels[i] == cur_level) in acpi_video_get_brightness()
258 vd->brightness->levels[request_level]); in acpi_video_set_brightness()
289 if (level == video->brightness->levels[offset]) { in video_get_cur_state()
308 level = video->brightness->levels[state - 1]; in video_set_cur_state()
326 union acpi_object **levels) in acpi_video_device_lcd_query_levels() argument
333 *levels = NULL; in acpi_video_device_lcd_query_levels()
345 *levels = obj; in acpi_video_device_lcd_query_levels()
371 if (level == device->brightness->levels[state]) { in acpi_video_device_lcd_set_level()
564 level = device->brightness->levels[bqc_value + in acpi_video_bqc_value_to_level()
601 if (device->brightness->levels[i] == *level) { in acpi_video_device_lcd_get_level_current()
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/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Dsi_dpm.c2413 smc_state->levels[0].dpm2.MaxPS = 0; in si_populate_power_containment_values()
2414 smc_state->levels[0].dpm2.NearTDPDec = 0; in si_populate_power_containment_values()
2415 smc_state->levels[0].dpm2.AboveSafeInc = 0; in si_populate_power_containment_values()
2416 smc_state->levels[0].dpm2.BelowSafeInc = 0; in si_populate_power_containment_values()
2417 smc_state->levels[0].dpm2.PwrEfficiencyRatio = 0; in si_populate_power_containment_values()
2466 …smc_state->levels[i].dpm2.MaxPS = (u8)((SISLANDS_DPM2_MAX_PULSE_SKIP * (max_sclk - min_sclk)) / ma… in si_populate_power_containment_values()
2467 smc_state->levels[i].dpm2.NearTDPDec = SISLANDS_DPM2_NEAR_TDP_DEC; in si_populate_power_containment_values()
2468 smc_state->levels[i].dpm2.AboveSafeInc = SISLANDS_DPM2_ABOVE_SAFE_INC; in si_populate_power_containment_values()
2469 smc_state->levels[i].dpm2.BelowSafeInc = SISLANDS_DPM2_BELOW_SAFE_INC; in si_populate_power_containment_values()
2470 smc_state->levels[i].dpm2.PwrEfficiencyRatio = cpu_to_be16(pwr_efficiency_ratio); in si_populate_power_containment_values()
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/Linux-v4.19/drivers/thermal/int340x_thermal/
Dint3406_thermal.c64 acpi_level = d->br->levels[d->upper_limit - state]; in int3406_thermal_set_cur_state()
87 if (acpi_level <= d->br->levels[index]) in int3406_thermal_get_cur_state()
119 d->lower_limit = int3406_thermal_get_index(d->br->levels, in int3406_thermal_get_limit()
124 d->upper_limit = int3406_thermal_get_index(d->br->levels, in int3406_thermal_get_limit()
/Linux-v4.19/Documentation/ABI/testing/
Dsysfs-class-backlight-adp55204 The backlight brightness control operates at three different levels for the
16 is at one of the three levels (daylight, office or dark). This
29 one of the three levels (daylight, office or dark). This is an
Dsysfs-class-backlight-adp88604 The backlight brightness control operates at three different levels for the
38 is at one of the three levels (daylight, office or dark). This
52 one of the three levels (daylight, office or dark). This is an
/Linux-v4.19/Documentation/devicetree/bindings/hwmon/
Dpwm-fan.txt6 - cooling-levels : PWM duty cycle values in a range from 0 to 255
16 cooling-levels = <0 102 170 230>;
Daspeed-pwm-tacho.txt34 For PWM port can be configured cooling-levels to create cooling device.
42 - cooling-levels: PWM duty cycle values in a range from 0 to 255
65 cooling-levels = /bits/ 8 <125 151 177 203 229 255>;
/Linux-v4.19/Documentation/cpuidle/
Dcore.txt2 Supporting multiple CPU idle levels in kernel
8 Various CPUs today support multiple idle levels that are differentiated
/Linux-v4.19/Documentation/ABI/
DREADME3 everchanging nature of Linux, and the differing maturity levels, these
6 We have four different levels of ABI stability, as shown by the four
7 different subdirectories in this location. Interfaces may change levels
10 The different levels of stability are:
61 How things move between levels:
/Linux-v4.19/drivers/gpu/drm/amd/powerplay/smumgr/
Dfiji_smumgr.c1028 struct SMU73_Discrete_GraphicsLevel *levels = in fiji_populate_all_graphic_levels() local
1039 &levels[i]); in fiji_populate_all_graphic_levels()
1045 levels[i].DeepSleepDivId = 0; in fiji_populate_all_graphic_levels()
1049 levels[0].EnabledForActivity = 1; in fiji_populate_all_graphic_levels()
1052 levels[dpm_table->sclk_table.count - 1].DisplayWatermark = in fiji_populate_all_graphic_levels()
1066 levels[i].pcieDpmLevel = in fiji_populate_all_graphic_levels()
1091 levels[i].pcieDpmLevel = hightest_pcie_level_enabled; in fiji_populate_all_graphic_levels()
1094 levels[0].pcieDpmLevel = lowest_pcie_level_enabled; in fiji_populate_all_graphic_levels()
1097 levels[1].pcieDpmLevel = mid_pcie_level_enabled; in fiji_populate_all_graphic_levels()
1100 result = smu7_copy_bytes_to_smc(hwmgr, array, (uint8_t *)levels, in fiji_populate_all_graphic_levels()
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