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Searched refs:io_base (Results 1 – 25 of 152) sorted by relevance

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/Linux-v4.19/drivers/staging/vt6655/
Dmac.c63 void __iomem *io_base = priv->PortOffset; in MACbIsRegBitsOn() local
65 return (ioread8(io_base + byRegOfs) & byTestBits) == byTestBits; in MACbIsRegBitsOn()
86 void __iomem *io_base = priv->PortOffset; in MACbIsRegBitsOff() local
88 return !(ioread8(io_base + byRegOfs) & byTestBits); in MACbIsRegBitsOff()
106 void __iomem *io_base = priv->PortOffset; in MACbIsIntDisable() local
108 if (ioread32(io_base + MAC_REG_IMR)) in MACbIsIntDisable()
131 void __iomem *io_base = priv->PortOffset; in MACvSetShortRetryLimit() local
133 iowrite8(byRetryLimit, io_base + MAC_REG_SRT); in MACvSetShortRetryLimit()
153 void __iomem *io_base = priv->PortOffset; in MACvSetLongRetryLimit() local
155 iowrite8(byRetryLimit, io_base + MAC_REG_LRT); in MACvSetLongRetryLimit()
[all …]
/Linux-v4.19/drivers/gpu/drm/meson/
Dmeson_venc.c917 priv->io_base + _REG(VENC_VDAC_SETTING)); in meson_venc_hdmi_mode_set()
919 writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_EN)); in meson_venc_hdmi_mode_set()
920 writel_relaxed(0, priv->io_base + _REG(ENCP_VIDEO_EN)); in meson_venc_hdmi_mode_set()
927 writel_relaxed(0x12, priv->io_base + _REG(ENCI_CFILT_CTRL)); in meson_venc_hdmi_mode_set()
928 writel_relaxed(0x12, priv->io_base + _REG(ENCI_CFILT_CTRL2)); in meson_venc_hdmi_mode_set()
931 writel_relaxed(0, priv->io_base + _REG(VENC_DVI_SETTING)); in meson_venc_hdmi_mode_set()
934 writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_MODE)); in meson_venc_hdmi_mode_set()
935 writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_MODE_ADV)); in meson_venc_hdmi_mode_set()
939 priv->io_base + _REG(ENCI_SYNC_HSO_BEGIN)); in meson_venc_hdmi_mode_set()
941 priv->io_base + _REG(ENCI_SYNC_HSO_END)); in meson_venc_hdmi_mode_set()
[all …]
Dmeson_vpp.c51 writel(mux, priv->io_base + _REG(VPU_VIU_VENC_MUX_CTRL)); in meson_vpp_setup_mux()
66 priv->io_base + _REG(VPP_OSD_SC_CTRL0)); in meson_vpp_setup_interlace_vscaler_osd1()
70 priv->io_base + _REG(VPP_OSD_SCI_WH_M1)); in meson_vpp_setup_interlace_vscaler_osd1()
73 priv->io_base + _REG(VPP_OSD_SCO_H_START_END)); in meson_vpp_setup_interlace_vscaler_osd1()
75 priv->io_base + _REG(VPP_OSD_SCO_V_START_END)); in meson_vpp_setup_interlace_vscaler_osd1()
78 writel_relaxed(BIT(16), priv->io_base + _REG(VPP_OSD_VSC_INI_PHASE)); in meson_vpp_setup_interlace_vscaler_osd1()
79 writel_relaxed(BIT(25), priv->io_base + _REG(VPP_OSD_VSC_PHASE_STEP)); in meson_vpp_setup_interlace_vscaler_osd1()
81 writel_relaxed(0, priv->io_base + _REG(VPP_OSD_HSC_CTRL0)); in meson_vpp_setup_interlace_vscaler_osd1()
90 priv->io_base + _REG(VPP_OSD_VSC_CTRL0)); in meson_vpp_setup_interlace_vscaler_osd1()
95 writel_relaxed(0, priv->io_base + _REG(VPP_OSD_SC_CTRL0)); in meson_vpp_disable_interlace_vscaler_osd1()
[all …]
Dmeson_viu.c101 priv->io_base + _REG(VIU_OSD1_MATRIX_PRE_OFFSET0_1)); in meson_viu_set_osd_matrix()
103 priv->io_base + _REG(VIU_OSD1_MATRIX_PRE_OFFSET2)); in meson_viu_set_osd_matrix()
105 priv->io_base + _REG(VIU_OSD1_MATRIX_COEF00_01)); in meson_viu_set_osd_matrix()
107 priv->io_base + _REG(VIU_OSD1_MATRIX_COEF02_10)); in meson_viu_set_osd_matrix()
109 priv->io_base + _REG(VIU_OSD1_MATRIX_COEF11_12)); in meson_viu_set_osd_matrix()
111 priv->io_base + _REG(VIU_OSD1_MATRIX_COEF20_21)); in meson_viu_set_osd_matrix()
115 priv->io_base + in meson_viu_set_osd_matrix()
118 priv->io_base + in meson_viu_set_osd_matrix()
121 priv->io_base + in meson_viu_set_osd_matrix()
123 writel(m[17] & 0x1fff, priv->io_base + in meson_viu_set_osd_matrix()
[all …]
/Linux-v4.19/arch/powerpc/platforms/embedded6xx/
Dflipper-pic.c53 void __iomem *io_base = irq_data_get_irq_chip_data(d); in flipper_pic_mask_and_ack() local
56 clrbits32(io_base + FLIPPER_IMR, mask); in flipper_pic_mask_and_ack()
58 out_be32(io_base + FLIPPER_ICR, mask); in flipper_pic_mask_and_ack()
64 void __iomem *io_base = irq_data_get_irq_chip_data(d); in flipper_pic_ack() local
67 out_be32(io_base + FLIPPER_ICR, 1 << irq); in flipper_pic_ack()
73 void __iomem *io_base = irq_data_get_irq_chip_data(d); in flipper_pic_mask() local
75 clrbits32(io_base + FLIPPER_IMR, 1 << irq); in flipper_pic_mask()
81 void __iomem *io_base = irq_data_get_irq_chip_data(d); in flipper_pic_unmask() local
83 setbits32(io_base + FLIPPER_IMR, 1 << irq); in flipper_pic_unmask()
120 static void __flipper_quiesce(void __iomem *io_base) in __flipper_quiesce() argument
[all …]
Dhlwd-pic.c50 void __iomem *io_base = irq_data_get_irq_chip_data(d); in hlwd_pic_mask_and_ack() local
53 clrbits32(io_base + HW_BROADWAY_IMR, mask); in hlwd_pic_mask_and_ack()
54 out_be32(io_base + HW_BROADWAY_ICR, mask); in hlwd_pic_mask_and_ack()
60 void __iomem *io_base = irq_data_get_irq_chip_data(d); in hlwd_pic_ack() local
62 out_be32(io_base + HW_BROADWAY_ICR, 1 << irq); in hlwd_pic_ack()
68 void __iomem *io_base = irq_data_get_irq_chip_data(d); in hlwd_pic_mask() local
70 clrbits32(io_base + HW_BROADWAY_IMR, 1 << irq); in hlwd_pic_mask()
76 void __iomem *io_base = irq_data_get_irq_chip_data(d); in hlwd_pic_unmask() local
78 setbits32(io_base + HW_BROADWAY_IMR, 1 << irq); in hlwd_pic_unmask()
81 clrbits32(io_base + HW_STARLET_IMR, 1 << irq); in hlwd_pic_unmask()
[all …]
/Linux-v4.19/sound/isa/
Dsscape.c147 unsigned io_base; member
201 static inline void sscape_write_unsafe(unsigned io_base, enum GA_REG reg, in sscape_write_unsafe() argument
204 outb(reg, ODIE_ADDR_IO(io_base)); in sscape_write_unsafe()
205 outb(val, ODIE_DATA_IO(io_base)); in sscape_write_unsafe()
218 sscape_write_unsafe(s->io_base, reg, val); in sscape_write()
226 static inline unsigned char sscape_read_unsafe(unsigned io_base, in sscape_read_unsafe() argument
229 outb(reg, ODIE_ADDR_IO(io_base)); in sscape_read_unsafe()
230 return inb(ODIE_DATA_IO(io_base)); in sscape_read_unsafe()
236 static inline void set_host_mode_unsafe(unsigned io_base) in set_host_mode_unsafe() argument
238 outb(0x0, HOST_CTRL_IO(io_base)); in set_host_mode_unsafe()
[all …]
/Linux-v4.19/drivers/watchdog/
Dni903x_wdt.c49 u16 io_base; member
67 u8 control = inb(wdt->io_base + NIWD_CONTROL); in ni903x_start()
69 outb(control | NIWD_CONTROL_RESET, wdt->io_base + NIWD_CONTROL); in ni903x_start()
70 outb(control | NIWD_CONTROL_PET, wdt->io_base + NIWD_CONTROL); in ni903x_start()
79 outb(((0x00FF0000 & counter) >> 16), wdt->io_base + NIWD_SEED2); in ni903x_wdd_set_timeout()
80 outb(((0x0000FF00 & counter) >> 8), wdt->io_base + NIWD_SEED1); in ni903x_wdd_set_timeout()
81 outb((0x000000FF & counter), wdt->io_base + NIWD_SEED0); in ni903x_wdd_set_timeout()
94 control = inb(wdt->io_base + NIWD_CONTROL); in ni903x_wdd_get_timeleft()
96 outb(control, wdt->io_base + NIWD_CONTROL); in ni903x_wdd_get_timeleft()
98 counter2 = inb(wdt->io_base + NIWD_COUNTER2); in ni903x_wdd_get_timeleft()
[all …]
Dnic7018_wdt.c55 u16 io_base; member
105 wdt->io_base + WDT_PRESET_PRESCALE); in nic7018_set_timeout()
120 control = inb(wdt->io_base + WDT_RELOAD_CTRL); in nic7018_start()
121 outb(control | WDT_RELOAD_PORT_EN, wdt->io_base + WDT_RELOAD_CTRL); in nic7018_start()
123 outb(1, wdt->io_base + WDT_RELOAD_PORT); in nic7018_start()
125 control = inb(wdt->io_base + WDT_CTRL); in nic7018_start()
126 outb(control | WDT_CTRL_RESET_EN, wdt->io_base + WDT_CTRL); in nic7018_start()
135 outb(0, wdt->io_base + WDT_CTRL); in nic7018_stop()
136 outb(0, wdt->io_base + WDT_RELOAD_CTRL); in nic7018_stop()
137 outb(0xF0, wdt->io_base + WDT_PRESET_PRESCALE); in nic7018_stop()
[all …]
/Linux-v4.19/sound/soc/spear/
Dspdif_in.c38 void *io_base; member
52 writel(ctrl, host->io_base + SPDIF_IN_CTRL); in spdif_in_configure()
53 writel(0xF, host->io_base + SPDIF_IN_IRQ_MASK); in spdif_in_configure()
74 writel(0x0, host->io_base + SPDIF_IN_IRQ_MASK); in spdif_in_shutdown()
79 u32 ctrl = readl(host->io_base + SPDIF_IN_CTRL); in spdif_in_format()
91 writel(ctrl, host->io_base + SPDIF_IN_CTRL); in spdif_in_format()
128 ctrl = readl(host->io_base + SPDIF_IN_CTRL); in spdif_in_trigger()
130 writel(ctrl, host->io_base + SPDIF_IN_CTRL); in spdif_in_trigger()
131 writel(0xF, host->io_base + SPDIF_IN_IRQ_MASK); in spdif_in_trigger()
137 ctrl = readl(host->io_base + SPDIF_IN_CTRL); in spdif_in_trigger()
[all …]
Dspdif_out.c39 void __iomem *io_base; member
46 writel(SPDIF_OUT_RESET, host->io_base + SPDIF_OUT_SOFT_RST); in spdif_out_configure()
48 writel(readl(host->io_base + SPDIF_OUT_SOFT_RST) & ~SPDIF_OUT_RESET, in spdif_out_configure()
49 host->io_base + SPDIF_OUT_SOFT_RST); in spdif_out_configure()
54 host->io_base + SPDIF_OUT_CFG); in spdif_out_configure()
56 writel(0x7F, host->io_base + SPDIF_OUT_INT_STA_CLR); in spdif_out_configure()
57 writel(0x7F, host->io_base + SPDIF_OUT_INT_EN_CLR); in spdif_out_configure()
99 ctrl = readl(host->io_base + SPDIF_OUT_CTRL); in spdif_out_clock()
102 writel(ctrl, host->io_base + SPDIF_OUT_CTRL); in spdif_out_clock()
165 ctrl = readl(host->io_base + SPDIF_OUT_CTRL); in spdif_out_trigger()
[all …]
/Linux-v4.19/drivers/fpga/
Dts73xx-fpga.c39 void __iomem *io_base; member
55 writeb(0, priv->io_base + TS73XX_FPGA_CONFIG_REG); in ts73xx_fpga_write_init()
57 writeb(TS73XX_FPGA_RESET, priv->io_base + TS73XX_FPGA_CONFIG_REG); in ts73xx_fpga_write_init()
72 ret = readb_poll_timeout(priv->io_base + TS73XX_FPGA_CONFIG_REG, in ts73xx_fpga_write()
78 writeb(buf[i], priv->io_base + TS73XX_FPGA_DATA_REG); in ts73xx_fpga_write()
92 reg = readb(priv->io_base + TS73XX_FPGA_CONFIG_REG); in ts73xx_fpga_write_complete()
94 writeb(reg, priv->io_base + TS73XX_FPGA_CONFIG_REG); in ts73xx_fpga_write_complete()
97 reg = readb(priv->io_base + TS73XX_FPGA_CONFIG_REG); in ts73xx_fpga_write_complete()
99 writeb(reg, priv->io_base + TS73XX_FPGA_CONFIG_REG); in ts73xx_fpga_write_complete()
101 reg = readb(priv->io_base + TS73XX_FPGA_CONFIG_REG); in ts73xx_fpga_write_complete()
[all …]
/Linux-v4.19/drivers/hwspinlock/
Du8500_hsem.c92 void __iomem *io_base; in u8500_hsem_probe() local
103 io_base = ioremap(res->start, resource_size(res)); in u8500_hsem_probe()
104 if (!io_base) in u8500_hsem_probe()
108 val = readl(io_base + HSEM_CTRL_REG); in u8500_hsem_probe()
109 writel((val & ~HSEM_PROTOCOL_1), io_base + HSEM_CTRL_REG); in u8500_hsem_probe()
112 writel(0xFFFF, io_base + HSEM_ICRALL); in u8500_hsem_probe()
123 hwlock->priv = io_base + HSEM_REGISTER_OFFSET + sizeof(u32) * i; in u8500_hsem_probe()
139 iounmap(io_base); in u8500_hsem_probe()
146 void __iomem *io_base = bank->lock[0].priv - HSEM_REGISTER_OFFSET; in u8500_hsem_remove() local
150 writel(0xFFFF, io_base + HSEM_ICRALL); in u8500_hsem_remove()
[all …]
Domap_hwspinlock.c80 void __iomem *io_base; in omap_hwspinlock_probe() local
92 io_base = ioremap(res->start, resource_size(res)); in omap_hwspinlock_probe()
93 if (!io_base) in omap_hwspinlock_probe()
108 i = readl(io_base + SYSSTATUS_OFFSET); in omap_hwspinlock_probe()
136 hwlock->priv = io_base + LOCK_BASE_OFFSET + sizeof(u32) * i; in omap_hwspinlock_probe()
149 iounmap(io_base); in omap_hwspinlock_probe()
156 void __iomem *io_base = bank->lock[0].priv - LOCK_BASE_OFFSET; in omap_hwspinlock_remove() local
166 iounmap(io_base); in omap_hwspinlock_remove()
/Linux-v4.19/drivers/mtd/nand/raw/
Dams-delta.c69 void __iomem *io_base = (void __iomem *)nand_get_controller_data(this); in ams_delta_write_byte() local
71 writew(0, io_base + OMAP_MPUIO_IO_CNTL); in ams_delta_write_byte()
82 void __iomem *io_base = (void __iomem *)nand_get_controller_data(this); in ams_delta_read_byte() local
86 writew(~0, io_base + OMAP_MPUIO_IO_CNTL); in ams_delta_read_byte()
180 void __iomem *io_base; in ams_delta_init() local
203 io_base = ioremap(res->start, resource_size(res)); in ams_delta_init()
204 if (io_base == NULL) { in ams_delta_init()
210 nand_set_controller_data(this, (void *)io_base); in ams_delta_init()
213 this->IO_ADDR_R = io_base + OMAP_MPUIO_INPUT_LATCH; in ams_delta_init()
214 this->IO_ADDR_W = io_base + OMAP_MPUIO_OUTPUT; in ams_delta_init()
[all …]
Dlpc32xx_slc.c230 void __iomem *io_base; member
252 writel(SLCCTRL_SW_RESET, SLC_CTRL(host->io_base)); in lpc32xx_nand_setup()
256 writel(0, SLC_CFG(host->io_base)); in lpc32xx_nand_setup()
257 writel(0, SLC_IEN(host->io_base)); in lpc32xx_nand_setup()
259 SLC_ICR(host->io_base)); in lpc32xx_nand_setup()
275 writel(tmp, SLC_TAC(host->io_base)); in lpc32xx_nand_setup()
289 tmp = readl(SLC_CFG(host->io_base)); in lpc32xx_nand_cmd_ctrl()
294 writel(tmp, SLC_CFG(host->io_base)); in lpc32xx_nand_cmd_ctrl()
298 writel(cmd, SLC_CMD(host->io_base)); in lpc32xx_nand_cmd_ctrl()
300 writel(cmd, SLC_ADDR(host->io_base)); in lpc32xx_nand_cmd_ctrl()
[all …]
Dlpc32xx_mlc.c191 void __iomem *io_base; member
247 writel(MLCCMD_RESET, MLC_CMD(host->io_base)); in lpc32xx_nand_setup()
257 writew(MLCLOCKPR_MAGIC, MLC_LOCK_PR(host->io_base)); in lpc32xx_nand_setup()
261 writel(tmp, MLC_ICR(host->io_base)); in lpc32xx_nand_setup()
265 writew(MLCLOCKPR_MAGIC, MLC_LOCK_PR(host->io_base)); in lpc32xx_nand_setup()
276 writel(tmp, MLC_TIME_REG(host->io_base)); in lpc32xx_nand_setup()
280 MLC_IRQ_MR(host->io_base)); in lpc32xx_nand_setup()
283 writel(MLCCEH_NORMAL, MLC_CEH(host->io_base)); in lpc32xx_nand_setup()
297 writel(cmd, MLC_CMD(host->io_base)); in lpc32xx_nand_cmd_ctrl()
299 writel(cmd, MLC_ADDR(host->io_base)); in lpc32xx_nand_cmd_ctrl()
[all …]
Dsocrates_nand.c31 void __iomem *io_base; member
49 out_be32(host->io_base, FPGA_NAND_ENABLE | in socrates_nand_write_buf()
70 out_be32(host->io_base, val); in socrates_nand_read_buf()
72 buf[i] = (in_be32(host->io_base) >> in socrates_nand_read_buf()
122 out_be32(host->io_base, val); in socrates_nand_cmd_ctrl()
133 if (in_be32(host->io_base) & FPGA_NAND_BUSY) in socrates_nand_device_ready()
153 host->io_base = of_iomap(ofdev->dev.of_node, 0); in socrates_nand_probe()
154 if (host->io_base == NULL) { in socrates_nand_probe()
199 iounmap(host->io_base); in socrates_nand_probe()
213 iounmap(host->io_base); in socrates_nand_remove()
Doxnas_nand.c36 void __iomem *io_base; member
46 return readb(oxnas->io_base); in oxnas_nand_read_byte()
54 ioread8_rep(oxnas->io_base, buf, len); in oxnas_nand_read_buf()
62 iowrite8_rep(oxnas->io_base, buf, len); in oxnas_nand_write_buf()
73 writeb(cmd, oxnas->io_base + OXNAS_NAND_CMD_CLE); in oxnas_nand_cmd_ctrl()
75 writeb(cmd, oxnas->io_base + OXNAS_NAND_CMD_ALE); in oxnas_nand_cmd_ctrl()
102 oxnas->io_base = devm_ioremap_resource(&pdev->dev, res); in oxnas_nand_probe()
103 if (IS_ERR(oxnas->io_base)) in oxnas_nand_probe()
104 return PTR_ERR(oxnas->io_base); in oxnas_nand_probe()
Dorion_nand.c54 void __iomem *io_base = chip->IO_ADDR_R; in orion_nand_read_buf() local
61 *buf++ = readb(io_base); in orion_nand_read_buf()
74 asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base)); in orion_nand_read_buf()
79 readsl(io_base, buf, len/4); in orion_nand_read_buf()
83 buf[i++] = readb(io_base); in orion_nand_read_buf()
93 void __iomem *io_base; in orion_nand_probe() local
106 io_base = devm_ioremap_resource(&pdev->dev, res); in orion_nand_probe()
108 if (IS_ERR(io_base)) in orion_nand_probe()
109 return PTR_ERR(io_base); in orion_nand_probe()
140 nc->IO_ADDR_R = nc->IO_ADDR_W = io_base; in orion_nand_probe()
/Linux-v4.19/drivers/input/keyboard/
Dspear-keyboard.c57 void __iomem *io_base; member
76 sts = readl_relaxed(kbd->io_base + STATUS_REG); in spear_kbd_interrupt()
86 val = readl_relaxed(kbd->io_base + DATA_REG) & in spear_kbd_interrupt()
97 writel_relaxed(0, kbd->io_base + STATUS_REG); in spear_kbd_interrupt()
121 writel_relaxed(val, kbd->io_base + MODE_CTL_REG); in spear_kbd_open()
122 writel_relaxed(1, kbd->io_base + STATUS_REG); in spear_kbd_open()
125 val = readl_relaxed(kbd->io_base + MODE_CTL_REG); in spear_kbd_open()
127 writel_relaxed(val, kbd->io_base + MODE_CTL_REG); in spear_kbd_open()
138 val = readl_relaxed(kbd->io_base + MODE_CTL_REG); in spear_kbd_close()
140 writel_relaxed(val, kbd->io_base + MODE_CTL_REG); in spear_kbd_close()
[all …]
/Linux-v4.19/drivers/mtd/devices/
Dspear_smi.c174 void __iomem *io_base; member
229 ctrlreg1 = readl(dev->io_base + SMI_CR1); in spear_smi_read_sr()
231 writel(ctrlreg1 & ~(SW_MODE | WB_MODE), dev->io_base + SMI_CR1); in spear_smi_read_sr()
235 dev->io_base + SMI_CR2); in spear_smi_read_sr()
248 writel(ctrlreg1, dev->io_base + SMI_CR1); in spear_smi_read_sr()
249 writel(0, dev->io_base + SMI_CR2); in spear_smi_read_sr()
301 status = readl(dev->io_base + SMI_SR); in spear_smi_int_handler()
307 writel(0, dev->io_base + SMI_SR); in spear_smi_int_handler()
343 writel(0, dev->io_base + SMI_SR); in spear_smi_hw_init()
345 writel(val, dev->io_base + SMI_CR1); in spear_smi_hw_init()
[all …]
/Linux-v4.19/drivers/mtd/spi-nor/
Dnxp-spifi.c61 void __iomem *io_base; member
73 ret = readb_poll_timeout(spifi->io_base + SPIFI_STAT, stat, in nxp_spifi_wait_for_cmd()
86 writel(SPIFI_STAT_RESET, spifi->io_base + SPIFI_STAT); in nxp_spifi_reset()
87 ret = readb_poll_timeout(spifi->io_base + SPIFI_STAT, stat, in nxp_spifi_reset()
119 writel(spifi->mcmd, spifi->io_base + SPIFI_MCMD); in nxp_spifi_set_memory_mode_on()
120 ret = readb_poll_timeout(spifi->io_base + SPIFI_STAT, stat, in nxp_spifi_set_memory_mode_on()
144 writel(cmd, spifi->io_base + SPIFI_CMD); in nxp_spifi_read_reg()
147 *buf++ = readb(spifi->io_base + SPIFI_DATA); in nxp_spifi_read_reg()
167 writel(cmd, spifi->io_base + SPIFI_CMD); in nxp_spifi_write_reg()
170 writeb(*buf++, spifi->io_base + SPIFI_DATA); in nxp_spifi_write_reg()
[all …]
Dstm32-quadspi.c146 void __iomem *io_base; member
179 if (readl_relaxed(qspi->io_base + QUADSPI_SR) & SR_TCF) in stm32_qspi_wait_cmd()
183 cr = readl_relaxed(qspi->io_base + QUADSPI_CR); in stm32_qspi_wait_cmd()
184 writel_relaxed(cr | CR_TCIE, qspi->io_base + QUADSPI_CR); in stm32_qspi_wait_cmd()
190 writel_relaxed(cr, qspi->io_base + QUADSPI_CR); in stm32_qspi_wait_cmd()
198 return readl_relaxed_poll_timeout(qspi->io_base + QUADSPI_SR, sr, in stm32_qspi_wait_nobusy()
253 ret = readl_relaxed_poll_timeout(qspi->io_base + QUADSPI_SR, in stm32_qspi_tx_poll()
260 tx_fifo(buf++, qspi->io_base + QUADSPI_DR); in stm32_qspi_tx_poll()
297 dcr = readl_relaxed(qspi->io_base + QUADSPI_DCR) & ~DCR_FSIZE_MASK; in stm32_qspi_send()
299 writel_relaxed(dcr, qspi->io_base + QUADSPI_DCR); in stm32_qspi_send()
[all …]
/Linux-v4.19/include/clocksource/
Dtimer-ti-dm.h101 void __iomem *io_base; member
280 tidr = readl_relaxed(timer->io_base); in __omap_dm_timer_init_regs()
283 timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET; in __omap_dm_timer_init_regs()
284 timer->irq_ena = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET; in __omap_dm_timer_init_regs()
285 timer->irq_dis = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET; in __omap_dm_timer_init_regs()
286 timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET; in __omap_dm_timer_init_regs()
287 timer->func_base = timer->io_base; in __omap_dm_timer_init_regs()
290 timer->irq_stat = timer->io_base + OMAP_TIMER_V2_IRQSTATUS; in __omap_dm_timer_init_regs()
291 timer->irq_ena = timer->io_base + OMAP_TIMER_V2_IRQENABLE_SET; in __omap_dm_timer_init_regs()
292 timer->irq_dis = timer->io_base + OMAP_TIMER_V2_IRQENABLE_CLR; in __omap_dm_timer_init_regs()
[all …]

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