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Searched refs:i915_ggtt_offset (Results 1 – 17 of 17) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/i915/selftests/
Di915_gem_coherency.c224 *cs++ = lower_32_bits(i915_ggtt_offset(vma) + offset); in gpu_set()
225 *cs++ = upper_32_bits(i915_ggtt_offset(vma) + offset); in gpu_set()
230 *cs++ = i915_ggtt_offset(vma) + offset; in gpu_set()
234 *cs++ = i915_ggtt_offset(vma) + offset; in gpu_set()
Dintel_workarounds.c70 *cs++ = i915_ggtt_offset(vma) + sizeof(u32) * i; in read_nonprivs()
/Linux-v4.19/drivers/gpu/drm/i915/
Dintel_ringbuffer.c182 i915_ggtt_offset(rq->engine->scratch) + 2 * CACHELINE_BYTES; in intel_emit_post_sync_nonzero_flush()
216 i915_ggtt_offset(rq->engine->scratch) + 2 * CACHELINE_BYTES; in gen6_render_ring_flush()
286 i915_ggtt_offset(rq->engine->scratch) + 2 * CACHELINE_BYTES; in gen7_render_ring_flush()
502 I915_WRITE_START(engine, i915_ggtt_offset(ring->vma)); in init_ring_common()
532 i915_ggtt_offset(ring->vma)); in init_ring_common()
943 u32 *cs, cs_offset = i915_ggtt_offset(rq->engine->scratch); in i830_emit_bb_start()
1518 *cs++ = i915_ggtt_offset(engine->scratch); in flush_pd_dir()
1593 *cs++ = i915_ggtt_offset(to_intel_context(i915->kernel_context, in mi_set_context()
1601 *cs++ = i915_ggtt_offset(rq->hw_context->state) | flags; in mi_set_context()
1627 *cs++ = i915_ggtt_offset(engine->scratch); in mi_set_context()
Dintel_lrc.c233 desc |= i915_ggtt_offset(ce->state) + LRC_HEADER_PAGES * PAGE_SIZE; in intel_lr_context_descriptor_update()
1343 i915_ggtt_offset(ce->ring->vma); in __execlists_context_pin()
1430 *batch++ = i915_ggtt_offset(engine->scratch) + 256; in gen8_emit_flush_coherentl3_wa()
1444 *batch++ = i915_ggtt_offset(engine->scratch) + 256; in gen8_emit_flush_coherentl3_wa()
1481 i915_ggtt_offset(engine->scratch) + in gen8_init_indirectctx_bb()
1558 i915_ggtt_offset(engine->scratch) in gen9_init_indirectctx_bb()
1959 regs[CTX_RING_BUFFER_START + 1] = i915_ggtt_offset(request->ring->vma); in execlists_reset()
2132 i915_ggtt_offset(engine->scratch) + 2 * CACHELINE_BYTES; in gen8_emit_flush_render()
2610 u32 ggtt_offset = i915_ggtt_offset(wa_ctx->vma); in execlists_init_reg_state()
2622 u32 ggtt_offset = i915_ggtt_offset(wa_ctx->vma); in execlists_init_reg_state()
Dintel_guc.h143 u32 offset = i915_ggtt_offset(vma); in intel_guc_ggtt_offset()
Di915_gem_render_state.c119 so->batch_offset = i915_ggtt_offset(so->vma); in render_state_setup()
Di915_perf.c518 u32 gtt_offset = i915_ggtt_offset(vma); in oa_buffer_check_unlocked()
653 u32 gtt_offset = i915_ggtt_offset(dev_priv->perf.oa.oa_buffer.vma); in gen8_append_oa_reports()
942 u32 gtt_offset = i915_ggtt_offset(dev_priv->perf.oa.oa_buffer.vma); in gen7_append_oa_reports()
1253 i915->perf.oa.specific_ctx_id = i915_ggtt_offset(ce->state); in oa_get_render_ctx_id()
1384 u32 gtt_offset = i915_ggtt_offset(dev_priv->perf.oa.oa_buffer.vma); in gen7_init_oa_buffer()
1433 u32 gtt_offset = i915_ggtt_offset(dev_priv->perf.oa.oa_buffer.vma); in gen8_init_oa_buffer()
1535 i915_ggtt_offset(dev_priv->perf.oa.oa_buffer.vma), in alloc_oa_buffer()
Dintel_fbdev.c246 info->fix.smem_start = dev->mode_config.fb_base + i915_ggtt_offset(vma); in intelfb_create()
274 fb->width, fb->height, i915_ggtt_offset(vma)); in intelfb_create()
Dintel_overlay.c820 iowrite32(i915_ggtt_offset(vma) + params->offset_Y, &regs->OBUF_0Y); in intel_overlay_do_put_image()
834 iowrite32(i915_ggtt_offset(vma) + params->offset_U, in intel_overlay_do_put_image()
836 iowrite32(i915_ggtt_offset(vma) + params->offset_V, in intel_overlay_do_put_image()
1363 overlay->flip_addr = i915_ggtt_offset(vma); in get_registers()
Di915_vma.h201 static inline u32 i915_ggtt_offset(const struct i915_vma *vma) in i915_ggtt_offset() function
Dintel_engine_cs.c612 engine->status_page.ggtt_offset = i915_ggtt_offset(vma); in init_status_page()
1396 i915_ggtt_offset(rq->ring->vma)); in intel_engine_print_registers()
1499 i915_ggtt_offset(rq->ring->vma)); in intel_engine_dump()
Dintel_fbc.c254 i915_ggtt_offset(params->vma) | ILK_FBC_RT_VALID); in ilk_fbc_activate()
Di915_gem.c1192 node.start = i915_ggtt_offset(vma); in i915_gem_gtt_pread()
1393 node.start = i915_ggtt_offset(vma); in i915_gem_gtt_pwrite_fast()
4469 i915_ggtt_offset(vma), alignment, in i915_gem_object_ggtt_pin()
Dintel_drv.h1647 return i915_ggtt_offset(state->vma); in intel_plane_ggtt_offset()
Di915_gpu_error.c1303 erq->start = i915_ggtt_offset(request->ring->vma); in record_request()
Di915_gem_gtt.c2051 u32 ggtt_offset = i915_ggtt_offset(vma) / PAGE_SIZE; in pd_vma_bind()
/Linux-v4.19/drivers/gpu/drm/i915/gvt/
Dscheduler.c460 bb->bb_start_cmd_va[1] = i915_ggtt_offset(bb->vma); in prepare_shadow_batch_buffer()
528 wa_ctx->indirect_ctx.shadow_gma = i915_ggtt_offset(vma); in prepare_shadow_wa_ctx()