Searched refs:hccr (Results 1 – 10 of 10) sorted by relevance
| /Linux-v4.19/drivers/scsi/qla2xxx/ |
| D | qla_dbg.c | 145 WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT); in qla27xx_dump_mpi_ram()
162 WRT_REG_DWORD(®->hccr, in qla27xx_dump_mpi_ram()
164 RD_REG_DWORD(®->hccr); in qla27xx_dump_mpi_ram()
169 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); in qla27xx_dump_mpi_ram()
170 RD_REG_DWORD(®->hccr); in qla27xx_dump_mpi_ram()
223 WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT); in qla24xx_dump_ram()
239 WRT_REG_DWORD(®->hccr, in qla24xx_dump_ram()
241 RD_REG_DWORD(®->hccr); in qla24xx_dump_ram()
246 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); in qla24xx_dump_ram()
247 RD_REG_DWORD(®->hccr); in qla24xx_dump_ram()
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| D | qla_isr.c | 43 uint16_t hccr; in qla2100_intr_handler() local
62 hccr = RD_REG_WORD(®->hccr); in qla2100_intr_handler()
63 if (qla2x00_check_reg16_for_disconnect(vha, hccr)) in qla2100_intr_handler()
65 if (hccr & HCCR_RISC_PAUSE) { in qla2100_intr_handler()
74 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); in qla2100_intr_handler()
75 RD_REG_WORD(®->hccr); in qla2100_intr_handler()
84 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); in qla2100_intr_handler()
85 RD_REG_WORD(®->hccr); in qla2100_intr_handler()
109 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); in qla2100_intr_handler()
110 RD_REG_WORD(®->hccr); in qla2100_intr_handler()
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| D | qla_init.c | 2321 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); in qla2300_pci_config()
2323 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) in qla2300_pci_config()
2344 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); in qla2300_pci_config()
2346 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) in qla2300_pci_config()
2508 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); in qla2x00_reset_chip()
2511 if ((RD_REG_WORD(®->hccr) & in qla2x00_reset_chip()
2517 RD_REG_WORD(®->hccr); /* PCI Posting. */ in qla2x00_reset_chip()
2559 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); in qla2x00_reset_chip()
2560 RD_REG_WORD(®->hccr); /* PCI Posting. */ in qla2x00_reset_chip()
2563 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); in qla2x00_reset_chip()
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| D | qla_dbg.h | 15 uint16_t hccr; member
39 uint16_t hccr; member
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| D | qla_mbx.c | 268 WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT); in qla2x00_mailbox_command()
270 WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT); in qla2x00_mailbox_command()
314 WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT); in qla2x00_mailbox_command()
316 WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT); in qla2x00_mailbox_command()
400 uint32_t ictrl, host_status, hccr; in qla2x00_mailbox_command() local
411 hccr = RD_REG_DWORD(®->isp24.hccr); in qla2x00_mailbox_command()
417 mb[7], host_status, hccr); in qla2x00_mailbox_command()
5188 WRT_REG_DWORD(®->hccr, HCCRX_SET_HOST_INT); in qla81xx_write_mpi_register()
5202 WRT_REG_DWORD(®->hccr, in qla81xx_write_mpi_register()
5204 RD_REG_DWORD(®->hccr); in qla81xx_write_mpi_register()
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| D | qla_sup.c | 2290 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); in qla2x00_suspend_hba()
2291 RD_REG_WORD(®->hccr); in qla2x00_suspend_hba()
2294 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) in qla2x00_suspend_hba()
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| D | qla_fw.h | 1059 uint32_t hccr; /* Host command & control register. */ member
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| D | qla_iocb.c | 474 RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr); in qla2x00_start_iocbs()
1529 RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr); in qla24xx_start_scsi()
1728 RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr); in qla24xx_dif_start_scsi()
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| D | qla_def.h | 690 uint16_t hccr; /* Host command & control register. */ member
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| D | qla_os.c | 6627 stat = RD_REG_DWORD(®->hccr); in qla2xxx_pci_mmio_enabled()
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