/Linux-v4.19/drivers/clocksource/ |
D | qcom-timer.c | 43 static void __iomem *event_base; variable 51 u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_interrupt() 53 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_interrupt() 62 u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_set_next_event() 65 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_set_next_event() 67 writel_relaxed(ctrl, event_base + TIMER_CLEAR); in msm_timer_set_next_event() 68 writel_relaxed(cycles, event_base + TIMER_MATCH_VAL); in msm_timer_set_next_event() 74 writel_relaxed(ctrl | TIMER_ENABLE_EN, event_base + TIMER_ENABLE); in msm_timer_set_next_event() 82 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_shutdown() 84 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_shutdown() [all …]
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/Linux-v4.19/arch/x86/events/ |
D | msr.c | 181 event->hw.event_base = msr[cfg].msr; in msr_event_init() 191 if (event->hw.event_base) in msr_read_counter() 192 rdmsrl(event->hw.event_base, now); in msr_read_counter() 213 if (unlikely(event->hw.event_base == MSR_SMI_COUNT)) { in msr_event_update() 216 } else if (unlikely(event->hw.event_base == MSR_IA32_THERM_STATUS)) { in msr_event_update()
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D | core.c | 1024 hwc->event_base = 0; in x86_assign_hw_event() 1027 hwc->event_base = MSR_ARCH_PERFMON_FIXED_CTR0 + (hwc->idx - INTEL_PMC_IDX_FIXED); in x86_assign_hw_event() 1031 hwc->event_base = x86_pmu_event_addr(hwc->idx); in x86_assign_hw_event() 1171 wrmsrl(hwc->event_base, (u64)(-left) & x86_pmu.cntval_mask); in x86_perf_event_set_period() 1179 wrmsrl(hwc->event_base, in x86_perf_event_set_period()
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/Linux-v4.19/arch/alpha/kernel/ |
D | perf_event.c | 351 evtype[n] = group->hw.event_base; in collect_events() 359 evtype[n] = pe->hw.event_base; in collect_events() 459 cpuc->evtype[n0] = event->hw.event_base; in alpha_pmu_add() 648 hwc->event_base = ev; in __hw_perf_event_init() 662 evtypes[n] = hwc->event_base; in __hw_perf_event_init()
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/Linux-v4.19/arch/s390/include/asm/ |
D | perf_event.h | 69 #define SAMPL_RATE(hwc) ((hwc)->event_base)
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/Linux-v4.19/arch/x86/events/intel/ |
D | cstate.c | 300 event->hw.event_base = core_msr[cfg].msr; in cstate_pmu_event_init() 309 event->hw.event_base = pkg_msr[cfg].msr; in cstate_pmu_event_init() 329 rdmsrl(event->hw.event_base, val); in cstate_pmu_read_counter()
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D | rapl.c | 176 rdmsrl(event->hw.event_base, raw); in rapl_read_counter() 204 rdmsrl(event->hw.event_base, new_raw_count); in rapl_event_update() 415 event->hw.event_base = msr; in rapl_pmu_event_init()
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D | uncore_snb.c | 349 return (u64)*(unsigned int *)(box->io_addr + hwc->event_base); in snb_uncore_imc_read_counter() 427 event->hw.event_base = base; in snb_uncore_imc_event_init()
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D | uncore.c | 116 rdmsrl(event->hw.event_base, count); in uncore_msr_read_counter() 207 hwc->event_base = uncore_fixed_ctr(box); in uncore_assign_hw_event() 213 hwc->event_base = uncore_perf_ctr(box, hwc->idx); in uncore_assign_hw_event() 752 event->hw.event_base = uncore_freerunning_counter(box, event); in uncore_pmu_event_init()
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D | p4.c | 873 rdmsrl(hwc->event_base, v); in p4_pmu_clear_cccr_ovf()
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D | uncore_snbep.c | 446 pci_read_config_dword(pdev, hwc->event_base, (u32 *)&count); in snbep_uncore_pci_read_counter() 447 pci_read_config_dword(pdev, hwc->event_base + 4, (u32 *)&count + 1); in snbep_uncore_pci_read_counter()
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D | core.c | 2159 wrmsrl(event->hw.event_base, 0); in intel_pmu_save_and_restart()
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/Linux-v4.19/arch/sparc/kernel/ |
D | perf_event.c | 1352 events[n] = group->hw.event_base; in collect_events() 1361 events[n] = event->hw.event_base; in collect_events() 1381 cpuc->events[n0] = event->hw.event_base; in sparc_pmu_add() 1451 hwc->event_base = perf_event_encode(pmap); in sparc_pmu_event_init() 1457 hwc->event_base = attr->config; in sparc_pmu_event_init() 1477 events[n] = hwc->event_base; in sparc_pmu_event_init()
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/Linux-v4.19/arch/x86/events/amd/ |
D | uncore.c | 109 wrmsrl(hwc->event_base, (u64)local64_read(&hwc->prev_count)); in amd_uncore_start() 160 hwc->event_base = uncore->msr_base + 1 + (2 * hwc->idx); in amd_uncore_add()
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/Linux-v4.19/arch/powerpc/perf/ |
D | imc-pmu.c | 515 event->hw.event_base = (u64)pcni->vbase + l_config; in nest_imc_event_init() 803 event->hw.event_base = (u64)pcmi->vbase + (config & IMC_EVENT_OFFSET_MASK); in core_imc_event_init() 915 return (u64 *)event->hw.event_base; in get_event_base_addr()
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D | core-book3s.c | 1428 flags[n] = group->hw.event_base; in collect_events() 1437 flags[n] = event->hw.event_base; in collect_events() 1470 cpuhw->flags[n0] = event->hw.event_base; in power_pmu_add() 1949 event->hw.event_base = cflags[n]; in power_pmu_event_init()
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/Linux-v4.19/arch/mips/kernel/ |
D | perf_event_mipsxx.c | 303 unsigned long cntr_mask = (hwc->event_base >> 8) & 0xffff; in mipsxx_pmu_alloc_counter() 329 unsigned int range = evt->event_base >> 24; in mipsxx_pmu_enable_event() 334 cpuc->saved_ctrl[idx] = M_PERFCTL_EVENT(evt->event_base & 0xff) | in mipsxx_pmu_enable_event() 1328 hwc->event_base = mipspmu_perf_event_encode(pev); in __hw_perf_event_init()
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/Linux-v4.19/drivers/perf/ |
D | arm-ccn.c | 917 dt_cfg = hw->event_base; in arm_ccn_pmu_xp_dt_config() 971 hw->event_base = CCN_XP_DT_CONFIG__DT_CFG__WATCHPOINT(wp); in arm_ccn_pmu_xp_watchpoint_config() 1014 hw->event_base = CCN_XP_DT_CONFIG__DT_CFG__XP_PMU_EVENT(hw->config_base); in arm_ccn_pmu_xp_event_config() 1037 hw->event_base = CCN_XP_DT_CONFIG__DT_CFG__DEVICE_PMU_EVENT(port, in arm_ccn_pmu_node_event_config()
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D | arm_pmu.c | 391 hwc->event_base = 0; in __hw_perf_event_init()
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D | arm-cci.c | 1302 hwc->event_base = 0; in __hw_perf_event_init()
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/Linux-v4.19/include/linux/ |
D | perf_event.h | 127 unsigned long event_base; member
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