Searched refs:dsi_pll (Results 1 – 7 of 7) sorted by relevance
102 config->dsi_pll.ctrl = 1 << (DSI_PLL_P1_POST_DIV_SHIFT + calc_p - 2); in dsi_calc_mnp()103 config->dsi_pll.div = in dsi_calc_mnp()132 config->dsi_pll.ctrl |= DSI_PLL_CLK_GATE_DSI0_DSIPLL; in vlv_dsi_pll_compute()135 config->dsi_pll.ctrl |= DSI_PLL_CLK_GATE_DSI1_DSIPLL; in vlv_dsi_pll_compute()137 config->dsi_pll.ctrl |= DSI_PLL_VCO_EN; in vlv_dsi_pll_compute()140 config->dsi_pll.div, config->dsi_pll.ctrl); in vlv_dsi_pll_compute()155 vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_DIVIDER, config->dsi_pll.div); in vlv_dsi_pll_enable()157 config->dsi_pll.ctrl & ~DSI_PLL_VCO_EN); in vlv_dsi_pll_enable()164 vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, config->dsi_pll.ctrl); in vlv_dsi_pll_enable()282 config->dsi_pll.ctrl = pll_ctl & ~DSI_PLL_LOCK; in vlv_dsi_get_pclk()[all …]
815 } dsi_pll; member
11579 PIPE_CONF_CHECK_X(dsi_pll.ctrl); in intel_pipe_config_compare()11580 PIPE_CONF_CHECK_X(dsi_pll.div); in intel_pipe_config_compare()
96 * "dsi_pll"100 * "dsi_pll"232 "dsi_pll",
121 msm-y += dsi/pll/dsi_pll.o
958 reg-names = "dsi_pll",
1340 reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator";
