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Searched refs:dpm (Results 1 – 25 of 35) sorted by relevance

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/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Damdgpu_dpm.c110 if (rps == adev->pm.dpm.current_ps) in amdgpu_dpm_print_ps_status()
112 if (rps == adev->pm.dpm.requested_ps) in amdgpu_dpm_print_ps_status()
114 if (rps == adev->pm.dpm.boot_ps) in amdgpu_dpm_print_ps_status()
125 adev->pm.dpm.new_active_crtcs = 0; in amdgpu_dpm_get_active_displays()
126 adev->pm.dpm.new_active_crtc_count = 0; in amdgpu_dpm_get_active_displays()
132 adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id); in amdgpu_dpm_get_active_displays()
133 adev->pm.dpm.new_active_crtc_count++; in amdgpu_dpm_get_active_displays()
320 adev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); in amdgpu_get_platform_caps()
321 adev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); in amdgpu_get_platform_caps()
322 adev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); in amdgpu_get_platform_caps()
[all …]
Dci_dpm.c321 struct ci_power_info *pi = adev->pm.dpm.priv; in ci_get_pi()
406 if (adev->pm.dpm.dyn_state.cac_leakage_table.entries == NULL) in ci_populate_bapm_vddc_vid_sidd()
408 if (adev->pm.dpm.dyn_state.cac_leakage_table.count > 8) in ci_populate_bapm_vddc_vid_sidd()
410 if (adev->pm.dpm.dyn_state.cac_leakage_table.count != in ci_populate_bapm_vddc_vid_sidd()
411 adev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count) in ci_populate_bapm_vddc_vid_sidd()
414 for (i = 0; i < adev->pm.dpm.dyn_state.cac_leakage_table.count; i++) { in ci_populate_bapm_vddc_vid_sidd()
415 if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) { in ci_populate_bapm_vddc_vid_sidd()
416 lo_vid[i] = ci_convert_to_vid(adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1); in ci_populate_bapm_vddc_vid_sidd()
417 hi_vid[i] = ci_convert_to_vid(adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2); in ci_populate_bapm_vddc_vid_sidd()
418 hi2_vid[i] = ci_convert_to_vid(adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3); in ci_populate_bapm_vddc_vid_sidd()
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Damdgpu_pm.c125 pm = adev->pm.dpm.user_state; in amdgpu_get_dpm_state()
156 adev->pm.dpm.user_state = state; in amdgpu_set_dpm_state()
243 level = adev->pm.dpm.forced_level; in amdgpu_get_dpm_forced_performance_level()
304 if (adev->pm.dpm.thermal_active) { in amdgpu_set_dpm_forced_performance_level()
313 adev->pm.dpm.forced_level = level; in amdgpu_set_dpm_forced_performance_level()
768 adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps; in amdgpu_set_pp_sclk_od()
812 adev->pm.dpm.current_ps = adev->pm.dpm.boot_ps; in amdgpu_set_pp_mclk_od()
1008 temp = adev->pm.dpm.thermal.min_temp; in amdgpu_hwmon_show_temp_thresh()
1010 temp = adev->pm.dpm.thermal.max_temp; in amdgpu_hwmon_show_temp_thresh()
1481 pm.dpm.thermal.work); in amdgpu_dpm_thermal_work_handler()
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Dsi_dpm.c1857 struct si_power_info *pi = adev->pm.dpm.priv; in si_get_pi()
1930 u32 p_limit1 = adev->pm.dpm.tdp_limit; in si_update_dte_from_pl2()
1931 u32 p_limit2 = adev->pm.dpm.near_tdp_limit; in si_update_dte_from_pl2()
1959 struct rv7xx_power_info *pi = adev->pm.dpm.priv; in rv770_get_pi()
1966 struct ni_power_info *pi = adev->pm.dpm.priv; in ni_get_pi()
2220 if (tdp_adjustment > (u32)adev->pm.dpm.tdp_od_limit) in si_calculate_adjusted_tdp_limits()
2223 max_tdp_limit = ((100 + 100) * adev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2226 *tdp_limit = ((100 + tdp_adjustment) * adev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2227 *near_tdp_limit = adev->pm.dpm.near_tdp_limit_adjusted + (*tdp_limit - adev->pm.dpm.tdp_limit); in si_calculate_adjusted_tdp_limits()
2229 *tdp_limit = ((100 - tdp_adjustment) * adev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
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Dkv_dpm.c77 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid2_to_vid7()
99 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid7_to_vid2()
380 struct kv_power_info *pi = adev->pm.dpm.priv; in kv_get_pi()
804 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_program_bootup_state()
906 &adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_populate_uvd_table()
979 &adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_populate_vce_table()
1040 &adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; in kv_populate_samu_table()
1106 &adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in kv_populate_acp_table()
1165 &adev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_calculate_dfs_bypass_settings()
1232 adev->pm.dpm.current_ps = &pi->current_rps; in kv_update_current_ps()
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/Linux-v4.19/drivers/gpu/drm/radeon/
Dr600_dpm.c148 if (rps == rdev->pm.dpm.current_ps) in r600_dpm_print_ps_status()
150 if (rps == rdev->pm.dpm.requested_ps) in r600_dpm_print_ps_status()
152 if (rps == rdev->pm.dpm.boot_ps) in r600_dpm_print_ps_status()
759 rdev->pm.dpm.thermal.min_temp = low_temp; in r600_set_thermal_temperature_range()
760 rdev->pm.dpm.thermal.max_temp = high_temp; in r600_set_thermal_temperature_range()
859 rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps); in r600_get_platform_caps()
860 rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); in r600_get_platform_caps()
861 rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); in r600_get_platform_caps()
896 rdev->pm.dpm.fan.t_hyst = fan_info->fan.ucTHyst; in r600_parse_extended_power_table()
897 rdev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin); in r600_parse_extended_power_table()
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Dradeon_pm.c74 rdev->pm.dpm.ac_power = true; in radeon_pm_acpi_event_handler()
76 rdev->pm.dpm.ac_power = false; in radeon_pm_acpi_event_handler()
78 if (rdev->asic->dpm.enable_bapm) in radeon_pm_acpi_event_handler()
79 radeon_dpm_enable_bapm(rdev, rdev->pm.dpm.ac_power); in radeon_pm_acpi_event_handler()
468 enum radeon_pm_state_type pm = rdev->pm.dpm.user_state; in radeon_get_dpm_state()
485 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY; in radeon_set_dpm_state()
487 rdev->pm.dpm.user_state = POWER_STATE_TYPE_BALANCED; in radeon_set_dpm_state()
489 rdev->pm.dpm.user_state = POWER_STATE_TYPE_PERFORMANCE; in radeon_set_dpm_state()
512 enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; in radeon_get_dpm_forced_performance_level()
549 if (rdev->asic->dpm.force_performance_level) { in radeon_set_dpm_forced_performance_level()
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Dbtc_dpm.c1230 return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_mclk_values, in btc_get_valid_mclk()
1237 return btc_find_valid_clock(&rdev->pm.dpm.dyn_state.valid_sclk_values, in btc_get_valid_sclk()
1280 if (((pl->mclk + (pl->sclk - 1)) / pl->sclk) > rdev->pm.dpm.dyn_state.mclk_sclk_ratio) in btc_adjust_clock_combinations()
1284 (rdev->pm.dpm.dyn_state.mclk_sclk_ratio - 1)) / in btc_adjust_clock_combinations()
1285 rdev->pm.dpm.dyn_state.mclk_sclk_ratio); in btc_adjust_clock_combinations()
1287 if ((pl->sclk - pl->mclk) > rdev->pm.dpm.dyn_state.sclk_mclk_delta) in btc_adjust_clock_combinations()
1291 rdev->pm.dpm.dyn_state.sclk_mclk_delta); in btc_adjust_clock_combinations()
1318 if ((*vddc - *vddci) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { in btc_apply_voltage_delta_rules()
1320 (*vddc - rdev->pm.dpm.dyn_state.vddc_vddci_delta)); in btc_apply_voltage_delta_rules()
1324 if ((*vddci - *vddc) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { in btc_apply_voltage_delta_rules()
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Dci_dpm.c196 struct ci_power_info *pi = rdev->pm.dpm.priv; in ci_get_pi()
281 if (rdev->pm.dpm.dyn_state.cac_leakage_table.entries == NULL) in ci_populate_bapm_vddc_vid_sidd()
283 if (rdev->pm.dpm.dyn_state.cac_leakage_table.count > 8) in ci_populate_bapm_vddc_vid_sidd()
285 if (rdev->pm.dpm.dyn_state.cac_leakage_table.count != in ci_populate_bapm_vddc_vid_sidd()
286 rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk.count) in ci_populate_bapm_vddc_vid_sidd()
289 for (i = 0; i < rdev->pm.dpm.dyn_state.cac_leakage_table.count; i++) { in ci_populate_bapm_vddc_vid_sidd()
290 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) { in ci_populate_bapm_vddc_vid_sidd()
291 lo_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1); in ci_populate_bapm_vddc_vid_sidd()
292 hi_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2); in ci_populate_bapm_vddc_vid_sidd()
293 hi2_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3); in ci_populate_bapm_vddc_vid_sidd()
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Dsi_dpm.c1765 struct si_power_info *pi = rdev->pm.dpm.priv; in si_get_pi()
1839 u32 p_limit1 = rdev->pm.dpm.tdp_limit; in si_update_dte_from_pl2()
1840 u32 p_limit2 = rdev->pm.dpm.near_tdp_limit; in si_update_dte_from_pl2()
2129 if (tdp_adjustment > (u32)rdev->pm.dpm.tdp_od_limit) in si_calculate_adjusted_tdp_limits()
2132 max_tdp_limit = ((100 + 100) * rdev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2135 *tdp_limit = ((100 + tdp_adjustment) * rdev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2136 *near_tdp_limit = rdev->pm.dpm.near_tdp_limit_adjusted + (*tdp_limit - rdev->pm.dpm.tdp_limit); in si_calculate_adjusted_tdp_limits()
2138 *tdp_limit = ((100 - tdp_adjustment) * rdev->pm.dpm.tdp_limit) / 100; in si_calculate_adjusted_tdp_limits()
2139 adjustment_delta = rdev->pm.dpm.tdp_limit - *tdp_limit; in si_calculate_adjusted_tdp_limits()
2140 if (adjustment_delta < rdev->pm.dpm.near_tdp_limit_adjusted) in si_calculate_adjusted_tdp_limits()
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Drv6xx_dpm.c46 struct rv6xx_power_info *pi = rdev->pm.dpm.priv; in rv6xx_get_pi()
922 rdev->pm.dpm.voltage_response_time, in rv6xx_program_voltage_timing_parameters()
926 rdev->pm.dpm.backbias_response_time, in rv6xx_program_voltage_timing_parameters()
1186 if (rdev->pm.dpm.new_active_crtcs & 1) { in rv6xx_program_display_gap()
1189 } else if (rdev->pm.dpm.new_active_crtcs & 2) { in rv6xx_program_display_gap()
1299 msleep((rdev->pm.dpm.voltage_response_time + 999) / 1000); in rv6xx_step_sw_voltage()
1549 struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; in rv6xx_dpm_enable()
1554 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS) in rv6xx_dpm_enable()
1616 struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; in rv6xx_dpm_disable()
1634 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_BACKBIAS) in rv6xx_dpm_disable()
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Dkv_dpm.c251 struct kv_power_info *pi = rdev->pm.dpm.priv; in kv_get_pi()
556 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid2_to_vid7()
578 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_convert_vid7_to_vid2()
719 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_program_bootup_state()
821 &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; in kv_populate_uvd_table()
894 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in kv_populate_vce_table()
955 &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; in kv_populate_samu_table()
1021 &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; in kv_populate_acp_table()
1080 &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; in kv_calculate_dfs_bypass_settings()
1280 kv_update_current_ps(rdev, rdev->pm.dpm.boot_ps); in kv_dpm_enable()
[all …]
Drs780_dpm.c43 struct igp_power_info *pi = rdev->pm.dpm.priv; in rs780_get_pi()
380 struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); in rs780_force_voltage()
407 struct igp_ps *current_state = rs780_get_ps(rdev->pm.dpm.current_ps); in rs780_force_fbdiv()
600 struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; in rs780_dpm_enable()
652 struct radeon_ps *new_ps = rdev->pm.dpm.requested_ps; in rs780_dpm_set_power_state()
653 struct radeon_ps *old_ps = rdev->pm.dpm.current_ps; in rs780_dpm_set_power_state()
742 rdev->pm.dpm.boot_ps = rps; in rs780_parse_pplib_non_clock_info()
744 rdev->pm.dpm.uvd_ps = rps; in rs780_parse_pplib_non_clock_info()
807 rdev->pm.dpm.ps = kcalloc(power_info->pplib.ucNumStates, in rs780_parse_power_table()
810 if (!rdev->pm.dpm.ps) in rs780_parse_power_table()
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Dni_dpm.c728 struct ni_power_info *pi = rdev->pm.dpm.priv; in ni_get_pi()
795 if ((rdev->pm.dpm.new_active_crtc_count > 1) || in ni_apply_state_adjust_rules()
801 if (rdev->pm.dpm.ac_power) in ni_apply_state_adjust_rules()
802 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ni_apply_state_adjust_rules()
804 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ni_apply_state_adjust_rules()
806 if (rdev->pm.dpm.ac_power == false) { in ni_apply_state_adjust_rules()
873 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, in ni_apply_state_adjust_rules()
876 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, in ni_apply_state_adjust_rules()
879 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, in ni_apply_state_adjust_rules()
882 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk, in ni_apply_state_adjust_rules()
[all …]
Dtrinity_dpm.c356 struct trinity_power_info *pi = rdev->pm.dpm.priv; in trinity_get_pi()
1060 rdev->pm.dpm.thermal.min_temp = low_temp; in trinity_set_thermal_temperature_range()
1061 rdev->pm.dpm.thermal.max_temp = high_temp; in trinity_set_thermal_temperature_range()
1123 trinity_update_current_ps(rdev, rdev->pm.dpm.boot_ps); in trinity_dpm_enable()
1171 trinity_update_current_ps(rdev, rdev->pm.dpm.boot_ps); in trinity_dpm_disable()
1226 rdev->pm.dpm.forced_level = level; in trinity_dpm_force_performance_level()
1234 struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps; in trinity_dpm_pre_set_power_state()
1255 trinity_dpm_bapm_enable(rdev, rdev->pm.dpm.ac_power); in trinity_dpm_set_power_state()
1509 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; in trinity_get_vce_clock_voltage()
1546 u32 num_active_displays = rdev->pm.dpm.new_active_crtc_count; in trinity_apply_state_adjust_rules()
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Drv770_dpm.c57 struct rv7xx_power_info *pi = rdev->pm.dpm.priv; in rv770_get_pi()
64 struct evergreen_power_info *pi = rdev->pm.dpm.priv; in evergreen_get_pi()
1191 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC) { in rv770_init_smc_table()
1194 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_DONT_WAIT_FOR_VBLANK_ON_ALERT) in rv770_init_smc_table()
1197 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_GOTO_BOOT_ON_ALERT) in rv770_init_smc_table()
1201 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) in rv770_init_smc_table()
1347 if (rdev->pm.dpm.new_active_crtcs & 1) { in rv770_program_display_gap()
1350 } else if (rdev->pm.dpm.new_active_crtcs & 2) { in rv770_program_display_gap()
1499 rdev->pm.dpm.forced_level = level; in rv770_dpm_force_performance_level()
1708 voltage_response_time = (u32)rdev->pm.dpm.voltage_response_time; in rv770_program_response_times()
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Dcypress_dpm.c1635 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_HARDWAREDC) in cypress_init_smc_table()
1638 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_REGULATOR_HOT) in cypress_init_smc_table()
1641 if (rdev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_STEPVDDC) in cypress_init_smc_table()
1748 if (rdev->pm.dpm.new_active_crtc_count > 0) in cypress_program_display_gap()
1753 if (rdev->pm.dpm.new_active_crtc_count > 1) in cypress_program_display_gap()
1763 if ((rdev->pm.dpm.new_active_crtc_count > 0) && in cypress_program_display_gap()
1764 (!(rdev->pm.dpm.new_active_crtcs & (1 << pipe)))) { in cypress_program_display_gap()
1767 if (rdev->pm.dpm.new_active_crtcs & (1 << i)) in cypress_program_display_gap()
1780 cypress_notify_smc_display_change(rdev, rdev->pm.dpm.new_active_crtc_count > 0); in cypress_program_display_gap()
1807 struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps; in cypress_dpm_enable()
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Dsumo_dpm.c84 struct sumo_power_info *pi = rdev->pm.dpm.priv; in sumo_get_pi()
1175 rdev->pm.dpm.thermal.min_temp = low_temp; in sumo_set_thermal_temperature_range()
1176 rdev->pm.dpm.thermal.max_temp = high_temp; in sumo_set_thermal_temperature_range()
1233 sumo_update_current_ps(rdev, rdev->pm.dpm.boot_ps); in sumo_dpm_enable()
1278 sumo_update_current_ps(rdev, rdev->pm.dpm.boot_ps); in sumo_dpm_disable()
1284 struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps; in sumo_dpm_pre_set_power_state()
1423 rdev->pm.dpm.boot_ps = rps; in sumo_parse_pplib_non_clock_info()
1427 rdev->pm.dpm.uvd_ps = rps; in sumo_parse_pplib_non_clock_info()
1485 rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries, in sumo_parse_power_table()
1488 if (!rdev->pm.dpm.ps) in sumo_parse_power_table()
[all …]
Dradeon.h1653 struct radeon_dpm dpm; member
1994 } dpm; member
2778 #define radeon_dpm_init(rdev) rdev->asic->dpm.init((rdev))
2779 #define radeon_dpm_setup_asic(rdev) rdev->asic->dpm.setup_asic((rdev))
2780 #define radeon_dpm_enable(rdev) rdev->asic->dpm.enable((rdev))
2781 #define radeon_dpm_late_enable(rdev) rdev->asic->dpm.late_enable((rdev))
2782 #define radeon_dpm_disable(rdev) rdev->asic->dpm.disable((rdev))
2783 #define radeon_dpm_pre_set_power_state(rdev) rdev->asic->dpm.pre_set_power_state((rdev))
2784 #define radeon_dpm_set_power_state(rdev) rdev->asic->dpm.set_power_state((rdev))
2785 #define radeon_dpm_post_set_power_state(rdev) rdev->asic->dpm.post_set_power_state((rdev))
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Dradeon_uvd.c877 radeon_uvd_count_handles(rdev, &rdev->pm.dpm.sd, in radeon_uvd_idle_work_handler()
878 &rdev->pm.dpm.hd); in radeon_uvd_idle_work_handler()
899 if ((rdev->pm.dpm.sd != sd) || in radeon_uvd_note_usage()
900 (rdev->pm.dpm.hd != hd)) { in radeon_uvd_note_usage()
901 rdev->pm.dpm.sd = sd; in radeon_uvd_note_usage()
902 rdev->pm.dpm.hd = hd; in radeon_uvd_note_usage()
Dradeon_asic.c1083 .dpm = {
1176 .dpm = {
1282 .dpm = {
1402 .dpm = {
1496 .dpm = {
1589 .dpm = {
1737 .dpm = {
1858 .dpm = {
1996 .dpm = {
2166 .dpm = {
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Dradeon_drv.c259 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
260 module_param_named(dpm, radeon_dpm, int, 0444);
/Linux-v4.19/drivers/net/can/
Djanz-ican3.c232 void __iomem *dpm; member
319 peer = ioread8(mod->dpm + MSYNC_PEER); in ican3_old_recv_msg()
320 locl = ioread8(mod->dpm + MSYNC_LOCL); in ican3_old_recv_msg()
337 memcpy_fromio(msg, mod->dpm, sizeof(*msg)); in ican3_old_recv_msg()
346 iowrite8(locl, mod->dpm + MSYNC_LOCL); in ican3_old_recv_msg()
364 peer = ioread8(mod->dpm + MSYNC_PEER); in ican3_old_send_msg()
365 locl = ioread8(mod->dpm + MSYNC_LOCL); in ican3_old_send_msg()
379 memcpy_toio(mod->dpm, msg, sizeof(*msg)); in ican3_old_send_msg()
386 iowrite8(locl, mod->dpm + MSYNC_LOCL); in ican3_old_send_msg()
409 dst = mod->dpm; in ican3_init_new_host_interface()
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/Linux-v4.19/Documentation/devicetree/bindings/power/supply/
Dbq24257.txt29 - ti,in-dpm-voltage: Configures the threshold input voltage for the dynamic
61 ti,in-dpm-voltage = <4440000>;
/Linux-v4.19/drivers/gpu/drm/amd/powerplay/hwmgr/
Dhardwaremanager.c247 adev->pm.dpm.thermal.min_temp = range.min; in phm_start_thermal_controller()
248 adev->pm.dpm.thermal.max_temp = range.max; in phm_start_thermal_controller()

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