110 	if (rps == adev->pm.dpm.current_ps)  in amdgpu_dpm_print_ps_status()
112 	if (rps == adev->pm.dpm.requested_ps)  in amdgpu_dpm_print_ps_status()
114 	if (rps == adev->pm.dpm.boot_ps)  in amdgpu_dpm_print_ps_status()
125 	adev->pm.dpm.new_active_crtcs = 0;  in amdgpu_dpm_get_active_displays()
126 	adev->pm.dpm.new_active_crtc_count = 0;  in amdgpu_dpm_get_active_displays()
132 				adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id);  in amdgpu_dpm_get_active_displays()
133 				adev->pm.dpm.new_active_crtc_count++;  in amdgpu_dpm_get_active_displays()
320 	adev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps);  in amdgpu_get_platform_caps()
321 	adev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);  in amdgpu_get_platform_caps()
322 	adev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);  in amdgpu_get_platform_caps()
359 			adev->pm.dpm.fan.t_hyst = fan_info->fan.ucTHyst;  in amdgpu_parse_extended_power_table()
360 			adev->pm.dpm.fan.t_min = le16_to_cpu(fan_info->fan.usTMin);  in amdgpu_parse_extended_power_table()
361 			adev->pm.dpm.fan.t_med = le16_to_cpu(fan_info->fan.usTMed);  in amdgpu_parse_extended_power_table()
362 			adev->pm.dpm.fan.t_high = le16_to_cpu(fan_info->fan.usTHigh);  in amdgpu_parse_extended_power_table()
363 			adev->pm.dpm.fan.pwm_min = le16_to_cpu(fan_info->fan.usPWMMin);  in amdgpu_parse_extended_power_table()
364 			adev->pm.dpm.fan.pwm_med = le16_to_cpu(fan_info->fan.usPWMMed);  in amdgpu_parse_extended_power_table()
365 			adev->pm.dpm.fan.pwm_high = le16_to_cpu(fan_info->fan.usPWMHigh);  in amdgpu_parse_extended_power_table()
367 				adev->pm.dpm.fan.t_max = le16_to_cpu(fan_info->fan2.usTMax);  in amdgpu_parse_extended_power_table()
369 				adev->pm.dpm.fan.t_max = 10900;  in amdgpu_parse_extended_power_table()
370 			adev->pm.dpm.fan.cycle_delay = 100000;  in amdgpu_parse_extended_power_table()
372 				adev->pm.dpm.fan.control_mode = fan_info->fan3.ucFanControlMode;  in amdgpu_parse_extended_power_table()
373 				adev->pm.dpm.fan.default_max_fan_pwm =  in amdgpu_parse_extended_power_table()
375 				adev->pm.dpm.fan.default_fan_output_sensitivity = 4836;  in amdgpu_parse_extended_power_table()
376 				adev->pm.dpm.fan.fan_output_sensitivity =  in amdgpu_parse_extended_power_table()
379 			adev->pm.dpm.fan.ucode_fan_control = true;  in amdgpu_parse_extended_power_table()
390 			ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_sclk,  in amdgpu_parse_extended_power_table()
401 			ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddci_dependency_on_mclk,  in amdgpu_parse_extended_power_table()
412 			ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.vddc_dependency_on_mclk,  in amdgpu_parse_extended_power_table()
423 			ret = amdgpu_parse_clk_voltage_dep_table(&adev->pm.dpm.dyn_state.mvdd_dependency_on_mclk,  in amdgpu_parse_extended_power_table()
436 				adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.sclk =  in amdgpu_parse_extended_power_table()
439 				adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.mclk =  in amdgpu_parse_extended_power_table()
442 				adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc =  in amdgpu_parse_extended_power_table()
444 				adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddci =  in amdgpu_parse_extended_power_table()
455 			adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries =  in amdgpu_parse_extended_power_table()
459 			if (!adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries) {  in amdgpu_parse_extended_power_table()
466 				adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].sclk =  in amdgpu_parse_extended_power_table()
468 				adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].mclk =  in amdgpu_parse_extended_power_table()
470 				adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].voltage =  in amdgpu_parse_extended_power_table()
475 			adev->pm.dpm.dyn_state.phase_shedding_limits_table.count =  in amdgpu_parse_extended_power_table()
483 		adev->pm.dpm.tdp_limit = le32_to_cpu(power_info->pplib5.ulTDPLimit);  in amdgpu_parse_extended_power_table()
484 		adev->pm.dpm.near_tdp_limit = le32_to_cpu(power_info->pplib5.ulNearTDPLimit);  in amdgpu_parse_extended_power_table()
485 		adev->pm.dpm.near_tdp_limit_adjusted = adev->pm.dpm.near_tdp_limit;  in amdgpu_parse_extended_power_table()
486 		adev->pm.dpm.tdp_od_limit = le16_to_cpu(power_info->pplib5.usTDPODLimit);  in amdgpu_parse_extended_power_table()
487 		if (adev->pm.dpm.tdp_od_limit)  in amdgpu_parse_extended_power_table()
488 			adev->pm.dpm.power_control = true;  in amdgpu_parse_extended_power_table()
490 			adev->pm.dpm.power_control = false;  in amdgpu_parse_extended_power_table()
491 		adev->pm.dpm.tdp_adjustment = 0;  in amdgpu_parse_extended_power_table()
492 		adev->pm.dpm.sq_ramping_threshold = le32_to_cpu(power_info->pplib5.ulSQRampingThreshold);  in amdgpu_parse_extended_power_table()
493 		adev->pm.dpm.cac_leakage = le32_to_cpu(power_info->pplib5.ulCACLeakage);  in amdgpu_parse_extended_power_table()
494 		adev->pm.dpm.load_line_slope = le16_to_cpu(power_info->pplib5.usLoadLineSlope);  in amdgpu_parse_extended_power_table()
502 			adev->pm.dpm.dyn_state.cac_leakage_table.entries = kzalloc(size, GFP_KERNEL);  in amdgpu_parse_extended_power_table()
503 			if (!adev->pm.dpm.dyn_state.cac_leakage_table.entries) {  in amdgpu_parse_extended_power_table()
509 				if (adev->pm.dpm.platform_caps & ATOM_PP_PLATFORM_CAP_EVV) {  in amdgpu_parse_extended_power_table()
510 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc1 =  in amdgpu_parse_extended_power_table()
512 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc2 =  in amdgpu_parse_extended_power_table()
514 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc3 =  in amdgpu_parse_extended_power_table()
517 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc =  in amdgpu_parse_extended_power_table()
519 					adev->pm.dpm.dyn_state.cac_leakage_table.entries[i].leakage =  in amdgpu_parse_extended_power_table()
525 			adev->pm.dpm.dyn_state.cac_leakage_table.count = cac_table->ucNumEntries;  in amdgpu_parse_extended_power_table()
556 			adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries =  in amdgpu_parse_extended_power_table()
558 			if (!adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries) {  in amdgpu_parse_extended_power_table()
562 			adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.count =  in amdgpu_parse_extended_power_table()
570 				adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].evclk =  in amdgpu_parse_extended_power_table()
572 				adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].ecclk =  in amdgpu_parse_extended_power_table()
574 				adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].v =  in amdgpu_parse_extended_power_table()
579 			adev->pm.dpm.num_of_vce_states =  in amdgpu_parse_extended_power_table()
582 			for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {  in amdgpu_parse_extended_power_table()
586 				adev->pm.dpm.vce_states[i].evclk =  in amdgpu_parse_extended_power_table()
588 				adev->pm.dpm.vce_states[i].ecclk =  in amdgpu_parse_extended_power_table()
590 				adev->pm.dpm.vce_states[i].clk_idx =  in amdgpu_parse_extended_power_table()
592 				adev->pm.dpm.vce_states[i].pstate =  in amdgpu_parse_extended_power_table()
611 			adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries =  in amdgpu_parse_extended_power_table()
613 			if (!adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries) {  in amdgpu_parse_extended_power_table()
617 			adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.count =  in amdgpu_parse_extended_power_table()
624 				adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].vclk =  in amdgpu_parse_extended_power_table()
626 				adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].dclk =  in amdgpu_parse_extended_power_table()
628 				adev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table.entries[i].v =  in amdgpu_parse_extended_power_table()
643 			adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries =  in amdgpu_parse_extended_power_table()
645 			if (!adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries) {  in amdgpu_parse_extended_power_table()
649 			adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.count =  in amdgpu_parse_extended_power_table()
653 				adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].clk =  in amdgpu_parse_extended_power_table()
655 				adev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table.entries[i].v =  in amdgpu_parse_extended_power_table()
666 			adev->pm.dpm.dyn_state.ppm_table =  in amdgpu_parse_extended_power_table()
668 			if (!adev->pm.dpm.dyn_state.ppm_table) {  in amdgpu_parse_extended_power_table()
672 			adev->pm.dpm.dyn_state.ppm_table->ppm_design = ppm->ucPpmDesign;  in amdgpu_parse_extended_power_table()
673 			adev->pm.dpm.dyn_state.ppm_table->cpu_core_number =  in amdgpu_parse_extended_power_table()
675 			adev->pm.dpm.dyn_state.ppm_table->platform_tdp =  in amdgpu_parse_extended_power_table()
677 			adev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdp =  in amdgpu_parse_extended_power_table()
679 			adev->pm.dpm.dyn_state.ppm_table->platform_tdc =  in amdgpu_parse_extended_power_table()
681 			adev->pm.dpm.dyn_state.ppm_table->small_ac_platform_tdc =  in amdgpu_parse_extended_power_table()
683 			adev->pm.dpm.dyn_state.ppm_table->apu_tdp =  in amdgpu_parse_extended_power_table()
685 			adev->pm.dpm.dyn_state.ppm_table->dgpu_tdp =  in amdgpu_parse_extended_power_table()
687 			adev->pm.dpm.dyn_state.ppm_table->dgpu_ulv_power =  in amdgpu_parse_extended_power_table()
689 			adev->pm.dpm.dyn_state.ppm_table->tj_max =  in amdgpu_parse_extended_power_table()
701 			adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries =  in amdgpu_parse_extended_power_table()
703 			if (!adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries) {  in amdgpu_parse_extended_power_table()
707 			adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.count =  in amdgpu_parse_extended_power_table()
711 				adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].clk =  in amdgpu_parse_extended_power_table()
713 				adev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table.entries[i].v =  in amdgpu_parse_extended_power_table()
724 			adev->pm.dpm.dyn_state.cac_tdp_table =  in amdgpu_parse_extended_power_table()
726 			if (!adev->pm.dpm.dyn_state.cac_tdp_table) {  in amdgpu_parse_extended_power_table()
734 				adev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit =  in amdgpu_parse_extended_power_table()
741 				adev->pm.dpm.dyn_state.cac_tdp_table->maximum_power_delivery_limit = 255;  in amdgpu_parse_extended_power_table()
744 			adev->pm.dpm.dyn_state.cac_tdp_table->tdp = le16_to_cpu(pt->usTDP);  in amdgpu_parse_extended_power_table()
745 			adev->pm.dpm.dyn_state.cac_tdp_table->configurable_tdp =  in amdgpu_parse_extended_power_table()
747 			adev->pm.dpm.dyn_state.cac_tdp_table->tdc = le16_to_cpu(pt->usTDC);  in amdgpu_parse_extended_power_table()
748 			adev->pm.dpm.dyn_state.cac_tdp_table->battery_power_limit =  in amdgpu_parse_extended_power_table()
750 			adev->pm.dpm.dyn_state.cac_tdp_table->small_power_limit =  in amdgpu_parse_extended_power_table()
752 			adev->pm.dpm.dyn_state.cac_tdp_table->low_cac_leakage =  in amdgpu_parse_extended_power_table()
754 			adev->pm.dpm.dyn_state.cac_tdp_table->high_cac_leakage =  in amdgpu_parse_extended_power_table()
763 					&adev->pm.dpm.dyn_state.vddgfx_dependency_on_sclk,  in amdgpu_parse_extended_power_table()
766 				kfree(adev->pm.dpm.dyn_state.vddgfx_dependency_on_sclk.entries);  in amdgpu_parse_extended_power_table()
777 	struct amdgpu_dpm_dynamic_state *dyn_state = &adev->pm.dpm.dyn_state;  in amdgpu_free_extended_power_table()
990 	if (idx < adev->pm.dpm.num_of_vce_states)  in amdgpu_get_vce_clock_state()
991 		return &adev->pm.dpm.vce_states[idx];  in amdgpu_get_vce_clock_state()