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Searched refs:dclk (Results 1 – 25 of 73) sorted by relevance

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/Linux-v4.19/drivers/gpu/drm/sun4i/
Dsun4i_dotclock.c32 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_disable() local
34 regmap_update_bits(dclk->regmap, SUN4I_TCON0_DCLK_REG, in sun4i_dclk_disable()
40 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_enable() local
42 return regmap_update_bits(dclk->regmap, SUN4I_TCON0_DCLK_REG, in sun4i_dclk_enable()
49 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_is_enabled() local
52 regmap_read(dclk->regmap, SUN4I_TCON0_DCLK_REG, &val); in sun4i_dclk_is_enabled()
60 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_recalc_rate() local
63 regmap_read(dclk->regmap, SUN4I_TCON0_DCLK_REG, &val); in sun4i_dclk_recalc_rate()
77 struct sun4i_dclk *dclk = hw_to_dclk(hw); in sun4i_dclk_round_rate() local
78 struct sun4i_tcon *tcon = dclk->tcon; in sun4i_dclk_round_rate()
[all …]
Dsun4i_rgb.c97 rounded_rate = clk_round_rate(tcon->dclk, rate); in sun4i_rgb_mode_valid()
/Linux-v4.19/drivers/clk/hisilicon/
Dclkdivider-hi6220.c53 struct hi6220_clk_divider *dclk = to_hi6220_clk_divider(hw); in hi6220_clkdiv_recalc_rate() local
55 val = readl_relaxed(dclk->reg) >> dclk->shift; in hi6220_clkdiv_recalc_rate()
56 val &= div_mask(dclk->width); in hi6220_clkdiv_recalc_rate()
58 return divider_recalc_rate(hw, parent_rate, val, dclk->table, in hi6220_clkdiv_recalc_rate()
59 CLK_DIVIDER_ROUND_CLOSEST, dclk->width); in hi6220_clkdiv_recalc_rate()
65 struct hi6220_clk_divider *dclk = to_hi6220_clk_divider(hw); in hi6220_clkdiv_round_rate() local
67 return divider_round_rate(hw, rate, prate, dclk->table, in hi6220_clkdiv_round_rate()
68 dclk->width, CLK_DIVIDER_ROUND_CLOSEST); in hi6220_clkdiv_round_rate()
77 struct hi6220_clk_divider *dclk = to_hi6220_clk_divider(hw); in hi6220_clkdiv_set_rate() local
79 value = divider_get_val(rate, parent_rate, dclk->table, in hi6220_clkdiv_set_rate()
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/Linux-v4.19/drivers/siox/
Dsiox-bus-gpio.c20 struct gpio_desc *dclk; member
38 gpiod_set_value_cansleep(ddata->dclk, 0); in siox_gpio_pushpull()
60 gpiod_set_value_cansleep(ddata->dclk, 1); in siox_gpio_pushpull()
62 gpiod_set_value_cansleep(ddata->dclk, 0); in siox_gpio_pushpull()
117 ddata->dclk = devm_gpiod_get(dev, "dclk", GPIOD_OUT_LOW); in siox_gpio_probe()
118 if (IS_ERR(ddata->dclk)) { in siox_gpio_probe()
119 ret = PTR_ERR(ddata->dclk); in siox_gpio_probe()
/Linux-v4.19/drivers/video/fbdev/riva/
Dnv_driver.c276 unsigned long dclk = 0; in riva_get_maxdclk() local
286 dclk = 800000; in riva_get_maxdclk()
288 dclk = 1000000; in riva_get_maxdclk()
294 dclk = 1000000; in riva_get_maxdclk()
303 dclk = 800000; in riva_get_maxdclk()
306 dclk = 1000000; in riva_get_maxdclk()
311 return dclk; in riva_get_maxdclk()
/Linux-v4.19/Documentation/devicetree/bindings/siox/
Deckelmann,siox-gpio.txt5 - din-gpios, dout-gpios, dclk-gpios, dld-gpios: references gpios for the
17 dclk-gpios = <&gpio6 9 0>;
/Linux-v4.19/drivers/gpu/drm/radeon/
Drs780_dpm.c571 (new_ps->dclk == old_ps->dclk)) in rs780_set_uvd_clock_before_set_eng_clock()
577 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rs780_set_uvd_clock_before_set_eng_clock()
588 (new_ps->dclk == old_ps->dclk)) in rs780_set_uvd_clock_after_set_eng_clock()
594 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rs780_set_uvd_clock_after_set_eng_clock()
728 rps->dclk = le32_to_cpu(non_clock_info->ulDCLK); in rs780_parse_pplib_non_clock_info()
731 rps->dclk = 0; in rs780_parse_pplib_non_clock_info()
735 if ((rps->vclk == 0) || (rps->dclk == 0)) { in rs780_parse_pplib_non_clock_info()
737 rps->dclk = RS780_DEFAULT_DCLK_FREQ; in rs780_parse_pplib_non_clock_info()
945 printk("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in rs780_dpm_print_power_state()
994 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in rs780_dpm_debugfs_print_current_performance_level()
Dtrinity_dpm.c897 if ((rps->vclk == 0) && (rps->dclk == 0)) in trinity_uvd_clocks_zero()
910 (rps1->dclk == rps2->dclk) && in trinity_uvd_clocks_equal()
942 radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk); in trinity_setup_uvd_clocks()
953 radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk); in trinity_setup_uvd_clocks()
1458 (rps->dclk == pi->sys_info.uvd_clock_table_entries[i].dclk)) in trinity_get_uvd_clock_index()
1692 rps->dclk = le32_to_cpu(non_clock_info->ulDCLK); in trinity_parse_pplib_non_clock_info()
1695 rps->dclk = 0; in trinity_parse_pplib_non_clock_info()
1935 pi->sys_info.uvd_clock_table_entries[i].dclk = in trinity_parse_sys_info_table()
2018 printk("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in trinity_dpm_print_power_state()
2043 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in trinity_dpm_debugfs_print_current_performance_level()
Dtrinity_dpm.h70 u32 dclk; member
Dsumo_dpm.c825 radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk); in sumo_setup_uvd_clocks()
842 (new_rps->dclk == old_rps->dclk)) in sumo_set_uvd_clock_before_set_eng_clock()
860 (new_rps->dclk == old_rps->dclk)) in sumo_set_uvd_clock_after_set_eng_clock()
1416 rps->dclk = le32_to_cpu(non_clock_info->ulDCLK); in sumo_parse_pplib_non_clock_info()
1419 rps->dclk = 0; in sumo_parse_pplib_non_clock_info()
1803 printk("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in sumo_dpm_print_power_state()
1826 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in sumo_dpm_debugfs_print_current_performance_level()
1834 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in sumo_dpm_debugfs_print_current_performance_level()
Drv770_dpm.c1440 (new_ps->dclk == old_ps->dclk)) in rv770_set_uvd_clock_before_set_eng_clock()
1446 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rv770_set_uvd_clock_before_set_eng_clock()
1457 (new_ps->dclk == old_ps->dclk)) in rv770_set_uvd_clock_after_set_eng_clock()
1463 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rv770_set_uvd_clock_after_set_eng_clock()
2155 rps->dclk = le32_to_cpu(non_clock_info->ulDCLK); in rv7xx_parse_pplib_non_clock_info()
2158 rps->dclk = 0; in rv7xx_parse_pplib_non_clock_info()
2162 if ((rps->vclk == 0) || (rps->dclk == 0)) { in rv7xx_parse_pplib_non_clock_info()
2164 rps->dclk = RV770_DEFAULT_DCLK_FREQ; in rv7xx_parse_pplib_non_clock_info()
2441 printk("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in rv770_dpm_print_power_state()
2485 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in rv770_dpm_debugfs_print_current_performance_level()
Drv6xx_dpm.c1520 (new_ps->dclk == old_ps->dclk)) in rv6xx_set_uvd_clock_before_set_eng_clock()
1526 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rv6xx_set_uvd_clock_before_set_eng_clock()
1537 (new_ps->dclk == old_ps->dclk)) in rv6xx_set_uvd_clock_after_set_eng_clock()
1543 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk); in rv6xx_set_uvd_clock_after_set_eng_clock()
1805 rps->dclk = RV6XX_DEFAULT_DCLK_FREQ; in rv6xx_parse_pplib_non_clock_info()
1808 rps->dclk = 0; in rv6xx_parse_pplib_non_clock_info()
2016 printk("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in rv6xx_dpm_print_power_state()
2048 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk); in rv6xx_dpm_debugfs_print_current_performance_level()
Dradeon_uvd.c960 unsigned vclk, unsigned dclk, in radeon_uvd_calc_upll_dividers() argument
975 vco_min = max(max(vco_min, vclk), dclk); in radeon_uvd_calc_upll_dividers()
996 dclk_div = radeon_uvd_calc_upll_post_div(vco_freq, dclk, in radeon_uvd_calc_upll_dividers()
1002 score = vclk - (vco_freq / vclk_div) + dclk - (vco_freq / dclk_div); in radeon_uvd_calc_upll_dividers()
Dradeon_asic.h411 int r600_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk);
478 int rv770_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk);
535 int sumo_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk);
536 int evergreen_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk);
749 int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk);
787 int cik_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk);
/Linux-v4.19/drivers/video/fbdev/core/
Dfbmon.c1106 u32 dclk; member
1195 static u32 fb_get_hblank_by_dclk(u32 dclk, u32 xres) in fb_get_hblank_by_dclk() argument
1199 dclk /= 1000; in fb_get_hblank_by_dclk()
1202 h_period += (M_VAL * xres * 2 * 1000)/(5 * dclk); in fb_get_hblank_by_dclk()
1246 timings->dclk = timings->htotal * timings->hfreq; in fb_timings_vfreq()
1257 timings->dclk = timings->htotal * timings->hfreq; in fb_timings_hfreq()
1262 timings->hblank = fb_get_hblank_by_dclk(timings->dclk, in fb_timings_dclk()
1265 timings->hfreq = timings->dclk/timings->htotal; in fb_timings_dclk()
1357 if (timings->dclk > dclkmax) { in fb_get_mode()
1358 timings->dclk = dclkmax; in fb_get_mode()
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/Linux-v4.19/Documentation/devicetree/bindings/display/rockchip/
Drockchip-vop.txt36 - dclk
52 reset-names = "axi", "ahb", "dclk";
/Linux-v4.19/drivers/gpu/drm/rockchip/
Drockchip_drm_vop.c131 struct clk *dclk; member
523 ret = clk_enable(vop->dclk); in vop_enable()
575 clk_disable(vop->dclk); in vop_enable()
620 clk_disable(vop->dclk); in vop_crtc_atomic_disable()
871 clk_round_rate(vop->dclk, mode->clock * 1000) / 1000; in vop_crtc_mode_fixup()
969 clk_set_rate(vop->dclk, adjusted_mode->clock * 1000); in vop_crtc_atomic_enable()
1394 vop->dclk = devm_clk_get(vop->dev, "dclk_vop"); in vop_initial()
1395 if (IS_ERR(vop->dclk)) { in vop_initial()
1397 return PTR_ERR(vop->dclk); in vop_initial()
1406 ret = clk_prepare(vop->dclk); in vop_initial()
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/Linux-v4.19/sound/soc/intel/skylake/
Dskl-ssp-clk.c277 static void unregister_src_clk(struct skl_clk_data *dclk) in unregister_src_clk() argument
279 u8 cnt = dclk->avail_clk_cnt; in unregister_src_clk()
282 clkdev_drop(dclk->clk[cnt]->lookup); in unregister_src_clk()
/Linux-v4.19/drivers/clk/samsung/
DMakefile21 obj-$(CONFIG_S3C2410_COMMON_DCLK)+= clk-s3c2410-dclk.o
DKconfig33 Temporary symbol to build the dclk driver based on the common clock
/Linux-v4.19/drivers/gpu/drm/amd/powerplay/hwmgr/
Dhwmgr_ppt.h59 uint32_t dclk; /* UVD D-clock */ member
/Linux-v4.19/drivers/gpu/drm/amd/powerplay/inc/
Dpower_state.h177 unsigned long dclk; member
/Linux-v4.19/include/linux/mfd/
Dsi476x-platform.h130 enum si476x_dclk_config dclk; member
/Linux-v4.19/drivers/gpu/drm/amd/display/dc/
Ddm_services_types.h66 struct dm_pp_clock_range dclk; member
/Linux-v4.19/drivers/video/fbdev/
Dssd1307fb.c291 u32 precharge, dclk, com_invdir, compins; in ssd1307fb_init() local
363 dclk = ((par->dclk_div - 1) & 0xf) | (par->dclk_frq & 0xf) << 4; in ssd1307fb_init()
364 ret = ssd1307fb_write_cmd(par->client, dclk); in ssd1307fb_init()

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