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Searched refs:csrows (Results 1 – 22 of 22) sorted by relevance

/Linux-v4.19/drivers/edac/
Dedac_mc.c186 mci->nr_csrows, mci->csrows); in edac_mc_dump_mci()
291 if (mci->csrows) { in _edac_mc_free()
293 csr = mci->csrows[row]; in _edac_mc_free()
303 kfree(mci->csrows); in _edac_mc_free()
395 mci->csrows = kcalloc(tot_csrows, sizeof(*mci->csrows), GFP_KERNEL); in edac_mc_alloc()
396 if (!mci->csrows) in edac_mc_alloc()
399 csr = kzalloc(sizeof(**mci->csrows), GFP_KERNEL); in edac_mc_alloc()
402 mci->csrows[row] = csr; in edac_mc_alloc()
432 chan = mci->csrows[row]->channels[chn]; in edac_mc_alloc()
732 struct csrow_info *csrow = mci->csrows[i]; in edac_mc_add_mc_with_groups()
[all …]
Dpasemi_edac.c114 mci->csrows[cs]->first_page, 0, 0, in pasemi_edac_process_error_info()
121 mci->csrows[cs]->first_page, 0, 0, in pasemi_edac_process_error_info()
144 csrow = mci->csrows[index]; in pasemi_edac_init_csrows()
Damd76x_edac.c148 mci->csrows[row]->first_page, 0, 0, in amd76x_process_error_info()
163 mci->csrows[row]->first_page, 0, 0, in amd76x_process_error_info()
196 csrow = mci->csrows[index]; in amd76x_init_csrows()
Dcell_edac.c37 struct csrow_info *csrow = mci->csrows[0]; in cell_edac_count_ce()
60 struct csrow_info *csrow = mci->csrows[0]; in cell_edac_count_ue()
130 struct csrow_info *csrow = mci->csrows[0]; in cell_edac_init_csrows()
Di82975x_edac.c310 chan = (mci->csrows[row]->nr_channels == 1) ? 0 : info->eap & 1; in i82975x_process_error_info()
313 (1 << mci->csrows[row]->channels[chan]->dimm->grain)); in i82975x_process_error_info()
392 csrow = mci->csrows[index]; in i82975x_init_csrows()
418 dimm = mci->csrows[index]->channels[chan]->dimm; in i82975x_init_csrows()
Dedac_mc_sysfs.c429 csrow = mci->csrows[i]; in edac_create_csrow_objects()
432 err = edac_create_csrow_object(mci, mci->csrows[i], i); in edac_create_csrow_objects()
444 csrow = mci->csrows[i]; in edac_create_csrow_objects()
447 put_device(&mci->csrows[i]->dev); in edac_create_csrow_objects()
459 csrow = mci->csrows[i]; in edac_delete_csrow_objects()
462 device_unregister(&mci->csrows[i]->dev); in edac_delete_csrow_objects()
675 struct csrow_info *ri = mci->csrows[row]; in mci_reset_counters_store()
807 struct csrow_info *csrow = mci->csrows[csrow_idx]; in mci_size_mb_show()
Di82860_edac.c118 dimm = mci->csrows[row]->channels[0]->dimm; in i82860_process_error_info()
163 csrow = mci->csrows[index]; in i82860_init_csrows()
Di3000_edac.c237 multi_chan = mci->csrows[0]->nr_channels - 1; in i3000_process_error_info()
393 struct csrow_info *csrow = mci->csrows[i]; in i3000_probe1()
Di82875p_edac.c229 multi_chan = mci->csrows[0]->nr_channels - 1; in i82875p_process_error_info()
363 csrow = mci->csrows[index]; in i82875p_init_csrows()
Dfsl_ddr_edac.c317 csrow = mci->csrows[row_index]; in fsl_mc_check()
443 csrow = mci->csrows[index]; in fsl_ddr_init_csrows()
Dcpc925_edac.c349 csrow = mci->csrows[index]; in cpc925_init_csrows()
464 if (mci->csrows[rank]->first_page == 0) { in cpc925_mc_get_pfn()
472 pa = mci->csrows[rank]->first_page << PAGE_SHIFT; in cpc925_mc_get_pfn()
Dr82600_edac.c232 csrow = mci->csrows[index]; in r82600_init_csrows()
Di82443bxgx_edac.c198 csrow = mci->csrows[index]; in i82443bxgx_init_csrows()
Dsynopsys_edac.c369 csi = mci->csrows[row]; in synps_edac_init_csrows()
Dx38_edac.c374 struct csrow_info *csrow = mci->csrows[i]; in x38_probe1()
De7xxx_edac.c380 csrow = mci->csrows[index]; in e7xxx_init_csrows()
Dppc4xx_edac.c924 struct csrow_info *csi = mci->csrows[row]; in ppc4xx_edac_init_csrows()
Dmv64x60_edac.c669 csrow = mci->csrows[0]; in mv64x60_init_csrows()
De752x_edac.c1097 csrow = mci->csrows[remap_csrow_index(mci, index)]; in e752x_init_csrows()
Damd64_edac.c2819 csrow = mci->csrows[i]; in init_csrows()
/Linux-v4.19/Documentation/admin-guide/
Dras.rst329 There can be multiple csrows and multiple channels.
337 Memory controllers allow for several csrows, with 8 csrows being a
338 typical value. Yet, the actual number of csrows depends on the layout of
371 channel 1. Notice that there are two csrows possible on a physical DIMM.
372 These csrows are allocated their csrow assignment based on the slot into
374 Channel, the csrows cross both DIMMs.
999 The minimum known unity is DIMMs. There are no information about csrows.
1000 As EDAC API maps the minimum unity is csrows, the driver sequentially
1001 maps channel/DIMM into different csrows.
1120 What happens here is that errors on different csrows, but at the same
/Linux-v4.19/include/linux/
Dedac.h596 struct csrow_info **csrows; member