| /Linux-v4.19/drivers/clk/meson/ |
| D | gxbb.c | 178 static struct clk_regmap gxbb_fixed_pll = {
231 static struct clk_regmap gxbb_hdmi_pll = {
283 static struct clk_regmap gxl_hdmi_pll = {
341 static struct clk_regmap gxbb_sys_pll = {
385 static struct clk_regmap gxbb_gp0_pll = {
434 static struct clk_regmap gxl_gp0_pll = {
490 static struct clk_regmap gxbb_fclk_div2 = {
515 static struct clk_regmap gxbb_fclk_div3 = {
539 static struct clk_regmap gxbb_fclk_div4 = {
563 static struct clk_regmap gxbb_fclk_div5 = {
[all …]
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| D | sclk-div.c | 22 meson_sclk_div_data(struct clk_regmap *clk) in meson_sclk_div_data()
98 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_round_rate()
107 static void sclk_apply_ratio(struct clk_regmap *clk, in sclk_apply_ratio()
123 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_set_duty_cycle()
137 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_get_duty_cycle()
153 static void sclk_apply_divider(struct clk_regmap *clk, in sclk_apply_divider()
165 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_set_rate()
180 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_recalc_rate()
188 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_enable()
198 struct clk_regmap *clk = to_clk_regmap(hw); in sclk_div_disable()
[all …]
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| D | axg.c | 25 static struct clk_regmap axg_fixed_pll = {
66 static struct clk_regmap axg_sys_pll = {
203 static struct clk_regmap axg_gp0_pll = {
256 static struct clk_regmap axg_hifi_pll = {
312 static struct clk_regmap axg_fclk_div2 = {
336 static struct clk_regmap axg_fclk_div3 = {
360 static struct clk_regmap axg_fclk_div4 = {
384 static struct clk_regmap axg_fclk_div5 = {
408 static struct clk_regmap axg_fclk_div7 = {
421 static struct clk_regmap axg_mpll_prediv = {
[all …]
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| D | clk-regmap.h | 23 struct clk_regmap { struct
29 #define to_clk_regmap(_hw) container_of(_hw, struct clk_regmap, hw) argument
48 clk_get_regmap_gate_data(struct clk_regmap *clk) in clk_get_regmap_gate_data()
75 clk_get_regmap_div_data(struct clk_regmap *clk) in clk_get_regmap_div_data()
105 clk_get_regmap_mux_data(struct clk_regmap *clk) in clk_get_regmap_mux_data()
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| D | clk-regmap.c | 11 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_gate_endisable()
33 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_gate_is_enabled()
56 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_div_recalc_rate()
75 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_div_round_rate()
101 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_div_set_rate()
133 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_mux_get_parent()
149 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_mux_set_parent()
161 struct clk_regmap *clk = to_clk_regmap(hw); in clk_regmap_mux_determine_rate()
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| D | meson8b.c | 97 static struct clk_regmap meson8b_fixed_pll = {
139 static struct clk_regmap meson8b_vid_pll = {
176 static struct clk_regmap meson8b_sys_pll = {
225 static struct clk_regmap meson8b_fclk_div2 = {
256 static struct clk_regmap meson8b_fclk_div3 = {
280 static struct clk_regmap meson8b_fclk_div4 = {
304 static struct clk_regmap meson8b_fclk_div5 = {
328 static struct clk_regmap meson8b_fclk_div7 = {
341 static struct clk_regmap meson8b_mpll_prediv = {
355 static struct clk_regmap meson8b_mpll0_div = {
[all …]
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| D | axg-aoclk.c | 20 static struct clk_regmap axg_aoclk_##_name = { \
42 static struct clk_regmap axg_aoclk_clk81 = {
56 static struct clk_regmap axg_aoclk_saradc_mux = {
70 static struct clk_regmap axg_aoclk_saradc_div = {
85 static struct clk_regmap axg_aoclk_saradc_gate = {
108 static struct clk_regmap *axg_aoclk_regmap[] = {
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| D | clk-triphase.c | 20 meson_clk_triphase_data(struct clk_regmap *clk) in meson_clk_triphase_data()
27 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_triphase_sync()
39 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_triphase_get_phase()
51 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_triphase_set_phase()
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| D | clk-phase.c | 13 meson_clk_phase_data(struct clk_regmap *clk) in meson_clk_phase_data()
38 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_phase_get_phase()
49 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_phase_set_phase()
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| D | clk-pll.c | 38 meson_clk_pll_data(struct clk_regmap *clk) in meson_clk_pll_data()
64 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_recalc_rate()
136 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_round_rate()
160 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_wait_lock()
177 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_init()
191 struct clk_regmap *clk = to_clk_regmap(hw); in meson_clk_pll_set_rate()
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| D | clk-mpll.c | 22 meson_clk_mpll_data(struct clk_regmap *clk) in meson_clk_mpll_data()
74 struct clk_regmap *clk = to_clk_regmap(hw); in mpll_recalc_rate()
90 struct clk_regmap *clk = to_clk_regmap(hw); in mpll_round_rate()
102 struct clk_regmap *clk = to_clk_regmap(hw); in mpll_set_rate()
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| D | gxbb-aoclk.c | 13 static struct clk_regmap _name##_ao = { \
53 static struct clk_regmap *gxbb_aoclk_gate[] = {
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| D | meson-aoclk.h | 23 struct clk_regmap **clks;
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| D | axg-audio.c | 25 struct clk_regmap axg_##_name = { \
40 struct clk_regmap axg_##_name = { \
57 struct clk_regmap axg_##_name = { \
163 struct clk_regmap axg_##_name = { \
210 struct clk_regmap axg_##_name = { \
317 struct clk_regmap axg_tdm##_name##_sclk = { \
498 static struct clk_regmap *const axg_audio_clk_regmaps[] = {
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| /Linux-v4.19/drivers/clk/qcom/ |
| D | clk-regmap.c | 24 struct clk_regmap *rclk = to_clk_regmap(hw); in clk_is_enabled_regmap()
50 struct clk_regmap *rclk = to_clk_regmap(hw); in clk_enable_regmap()
74 struct clk_regmap *rclk = to_clk_regmap(hw); in clk_disable_regmap()
96 int devm_clk_register_regmap(struct device *dev, struct clk_regmap *rclk) in devm_clk_register_regmap()
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| D | clk-regmap.h | 20 struct clk_regmap { struct
27 #define to_clk_regmap(_hw) container_of(_hw, struct clk_regmap, hw) argument
32 int devm_clk_register_regmap(struct device *dev, struct clk_regmap *rclk);
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| D | clk-rcg.h | 86 struct clk_regmap clkr;
125 struct clk_regmap clkr;
152 struct clk_regmap clkr;
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| D | clk-regmap-divider.c | 30 struct clk_regmap *clkr = ÷r->clkr; in div_round_ro_rate()
54 struct clk_regmap *clkr = ÷r->clkr; in div_set_rate()
69 struct clk_regmap *clkr = ÷r->clkr; in div_recalc_rate()
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| D | common.h | 9 struct clk_regmap;
24 struct clk_regmap **clks;
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| D | clk-regmap-mux.c | 29 struct clk_regmap *clkr = to_clk_regmap(hw); in mux_get_parent()
47 struct clk_regmap *clkr = to_clk_regmap(hw); in mux_set_parent()
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| D | clk-alpha-pll.h | 61 struct clk_regmap clkr;
80 struct clk_regmap clkr;
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| D | clk-regmap-divider.h | 24 struct clk_regmap clkr;
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| D | clk-regmap-mux.h | 26 struct clk_regmap clkr;
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| D | clk-regmap-mux-div.h | 36 struct clk_regmap clkr;
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| /Linux-v4.19/drivers/clk/nxp/ |
| D | clk-lpc32xx.c | 79 static struct regmap *clk_regmap; variable
398 regmap_read(clk_regmap, clk->reg, &val); in clk_mask_enable()
403 return regmap_update_bits(clk_regmap, clk->reg, in clk_mask_enable()
411 regmap_update_bits(clk_regmap, clk->reg, in clk_mask_disable()
420 regmap_read(clk_regmap, clk->reg, &val); in clk_mask_is_enabled()
436 regmap_update_bits(clk_regmap, clk->reg, clk->enable, clk->enable); in clk_pll_enable()
439 regmap_read(clk_regmap, clk->reg, &val); in clk_pll_enable()
454 regmap_update_bits(clk_regmap, clk->reg, clk->enable, 0x0); in clk_pll_disable()
462 regmap_read(clk_regmap, clk->reg, &val); in clk_pll_is_enabled()
485 regmap_read(clk_regmap, clk->reg, &val); in clk_pll_recalc_rate()
[all …]
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