79 static struct regmap *clk_regmap;  variable
398 	regmap_read(clk_regmap, clk->reg, &val);  in clk_mask_enable()
403 	return regmap_update_bits(clk_regmap, clk->reg,  in clk_mask_enable()
411 	regmap_update_bits(clk_regmap, clk->reg,  in clk_mask_disable()
420 	regmap_read(clk_regmap, clk->reg, &val);  in clk_mask_is_enabled()
436 	regmap_update_bits(clk_regmap, clk->reg, clk->enable, clk->enable);  in clk_pll_enable()
439 		regmap_read(clk_regmap, clk->reg, &val);  in clk_pll_enable()
454 	regmap_update_bits(clk_regmap, clk->reg, clk->enable, 0x0);  in clk_pll_disable()
462 	regmap_read(clk_regmap, clk->reg, &val);  in clk_pll_is_enabled()
485 	regmap_read(clk_regmap, clk->reg, &val);  in clk_pll_recalc_rate()
584 	return regmap_update_bits(clk_regmap, clk->reg, 0x1FFFF, val);  in clk_pll_set_rate()
723 	regmap_read(clk_regmap, clk->reg, &val);  in clk_ddram_is_enabled()
735 	regmap_read(clk_regmap, clk->reg, &val);  in clk_ddram_enable()
746 	return regmap_update_bits(clk_regmap, clk->reg,  in clk_ddram_enable()
759 	regmap_read(clk_regmap, clk->reg, &val);  in clk_ddram_recalc_rate()
778 	regmap_read(clk_regmap, clk->reg, &val);  in lpc32xx_clk_uart_recalc_rate()
810 		regmap_read(clk_regmap, LPC32XX_CLKPWR_USB_CTRL, &ctrl_val);  in clk_usb_enable()
811 		regmap_update_bits(clk_regmap, LPC32XX_CLKPWR_USB_CTRL,  in clk_usb_enable()
818 			regmap_write(clk_regmap, LPC32XX_CLKPWR_USB_CTRL,  in clk_usb_enable()
836 		regmap_write(clk_regmap, LPC32XX_CLKPWR_USB_CTRL, ctrl_val);  in clk_usb_enable()
850 		regmap_update_bits(clk_regmap, LPC32XX_CLKPWR_USB_CTRL,  in clk_usb_disable()
860 		regmap_read(clk_regmap, LPC32XX_CLKPWR_USB_CTRL, &ctrl_val);  in clk_usb_is_enabled()
895 	return regmap_update_bits(clk_regmap, clk->reg, mask, val);  in lpc32xx_clk_gate_enable()
904 	regmap_update_bits(clk_regmap, clk->reg, mask, val);  in lpc32xx_clk_gate_disable()
913 	regmap_read(clk_regmap, clk->reg, &val);  in lpc32xx_clk_gate_is_enabled()
954 	regmap_read(clk_regmap, divider->reg, &val);  in clk_divider_recalc_rate()
971 		regmap_read(clk_regmap, divider->reg, &bestdiv);  in clk_divider_round_rate()
992 	return regmap_update_bits(clk_regmap, divider->reg,  in clk_divider_set_rate()
1009 	regmap_read(clk_regmap, mux->reg, &val);  in clk_mux_get_parent()
1035 	return regmap_update_bits(clk_regmap, mux->reg,  in clk_mux_set_parent()
1485 	regmap_read(clk_regmap, reg, &val);  in lpc32xx_clk_div_quirk()
1492 	regmap_update_bits(clk_regmap, reg, gate | div_mask, val);  in lpc32xx_clk_div_quirk()
1526 	clk_regmap = regmap_init_mmio(NULL, base, &lpc32xx_scb_regmap_config);  in lpc32xx_clk_init()
1527 	if (IS_ERR(clk_regmap)) {  in lpc32xx_clk_init()
1529 			PTR_ERR(clk_regmap));  in lpc32xx_clk_init()