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Searched refs:clk_register_divider_table (Results 1 – 25 of 26) sorted by relevance

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/Linux-v4.19/drivers/clk/sirf/
Dclk-atlas7.c1464 clk = clk_register_divider_table(NULL, "cpupll_div1", "cpupll_vco", 0, in atlas7_clk_init()
1468 clk = clk_register_divider_table(NULL, "cpupll_div2", "cpupll_vco", 0, in atlas7_clk_init()
1472 clk = clk_register_divider_table(NULL, "cpupll_div3", "cpupll_vco", 0, in atlas7_clk_init()
1477 clk = clk_register_divider_table(NULL, "mempll_div1", "mempll_vco", 0, in atlas7_clk_init()
1481 clk = clk_register_divider_table(NULL, "mempll_div2", "mempll_vco", 0, in atlas7_clk_init()
1485 clk = clk_register_divider_table(NULL, "mempll_div3", "mempll_vco", 0, in atlas7_clk_init()
1490 clk = clk_register_divider_table(NULL, "sys0pll_div1", "sys0pll_vco", 0, in atlas7_clk_init()
1494 clk = clk_register_divider_table(NULL, "sys0pll_div2", "sys0pll_vco", 0, in atlas7_clk_init()
1498 clk = clk_register_divider_table(NULL, "sys0pll_div3", "sys0pll_vco", 0, in atlas7_clk_init()
1505 clk = clk_register_divider_table(NULL, "sys1pll_div1", "sys1pll_vco", 0, in atlas7_clk_init()
[all …]
/Linux-v4.19/drivers/clk/sunxi/
Dclk-sun6i-apb0.c51 clk = clk_register_divider_table(&pdev->dev, clk_name, clk_parent, in sun6i_a31_apb0_clk_probe()
Dclk-sunxi.c805 clk = clk_register_divider_table(NULL, clk_name, clk_parent, 0, in sunxi_divider_clk_setup()
/Linux-v4.19/drivers/clk/imx/
Dclk-imx6sl.c266 …clks[IMX6SL_CLK_PLL4_POST_DIV] = clk_register_divider_table(NULL, "pll4_post_div", "pll4_audio",… in imx6sl_clocks_init()
268 …clks[IMX6SL_CLK_PLL5_POST_DIV] = clk_register_divider_table(NULL, "pll5_post_div", "pll5_video",… in imx6sl_clocks_init()
269 …clks[IMX6SL_CLK_PLL5_VIDEO_DIV] = clk_register_divider_table(NULL, "pll5_video_div", "pll5_post_di… in imx6sl_clocks_init()
270 …clks[IMX6SL_CLK_ENET_REF] = clk_register_divider_table(NULL, "enet_ref", "pll6_enet", … in imx6sl_clocks_init()
Dclk-imx6ul.c209 clks[IMX6UL_CLK_ENET_REF] = clk_register_divider_table(NULL, "enet_ref", "pll6_enet", 0, in imx6ul_clocks_init()
211 clks[IMX6UL_CLK_ENET2_REF] = clk_register_divider_table(NULL, "enet2_ref", "pll6_enet", 0, in imx6ul_clocks_init()
218 clks[IMX6UL_CLK_PLL4_POST_DIV] = clk_register_divider_table(NULL, "pll4_post_div", "pll4_audio", in imx6ul_clocks_init()
222 clks[IMX6UL_CLK_PLL5_POST_DIV] = clk_register_divider_table(NULL, "pll5_post_div", "pll5_video", in imx6ul_clocks_init()
224 …clks[IMX6UL_CLK_PLL5_VIDEO_DIV] = clk_register_divider_table(NULL, "pll5_video_div", "pll5_post_di… in imx6ul_clocks_init()
Dclk-imx6sx.c222 clks[IMX6SX_CLK_ENET_REF] = clk_register_divider_table(NULL, "enet_ref", "pll6_enet", 0, in imx6sx_clocks_init()
225 clks[IMX6SX_CLK_ENET2_REF] = clk_register_divider_table(NULL, "enet2_ref", "pll6_enet", 0, in imx6sx_clocks_init()
251 clks[IMX6SX_CLK_PLL4_POST_DIV] = clk_register_divider_table(NULL, "pll4_post_div", "pll4_audio", in imx6sx_clocks_init()
255 clks[IMX6SX_CLK_PLL5_POST_DIV] = clk_register_divider_table(NULL, "pll5_post_div", "pll5_video", in imx6sx_clocks_init()
257 …clks[IMX6SX_CLK_PLL5_VIDEO_DIV] = clk_register_divider_table(NULL, "pll5_video_div", "pll5_post_di… in imx6sx_clocks_init()
Dclk-imx6sll.c167 clks[IMX6SLL_CLK_PLL4_POST_DIV] = clk_register_divider_table(NULL, "pll4_post_div", "pll4_audio", in imx6sll_clocks_init()
171 clks[IMX6SLL_CLK_PLL5_POST_DIV] = clk_register_divider_table(NULL, "pll5_post_div", "pll5_video", in imx6sll_clocks_init()
173 …clks[IMX6SLL_CLK_PLL5_VIDEO_DIV] = clk_register_divider_table(NULL, "pll5_video_div", "pll5_post_d… in imx6sll_clocks_init()
Dclk-imx7d.c444 …clks[IMX7D_PLL_DRAM_TEST_DIV] = clk_register_divider_table(NULL, "pll_dram_test_div", "pll_dram_m… in imx7d_clocks_init()
446 …clks[IMX7D_PLL_AUDIO_TEST_DIV] = clk_register_divider_table(NULL, "pll_audio_test_div", "pll_audi… in imx7d_clocks_init()
448 …clks[IMX7D_PLL_AUDIO_POST_DIV] = clk_register_divider_table(NULL, "pll_audio_post_div", "pll_audio… in imx7d_clocks_init()
450 …clks[IMX7D_PLL_VIDEO_TEST_DIV] = clk_register_divider_table(NULL, "pll_video_test_div", "pll_vide… in imx7d_clocks_init()
452 …clks[IMX7D_PLL_VIDEO_POST_DIV] = clk_register_divider_table(NULL, "pll_video_post_div", "pll_video… in imx7d_clocks_init()
Dclk-imx6q.c500 clk[IMX6QDL_CLK_ENET_REF] = clk_register_divider_table(NULL, "enet_ref", "pll6_enet", 0, in imx6q_clocks_init()
541 …clk[IMX6QDL_CLK_PLL4_POST_DIV] = clk_register_divider_table(NULL, "pll4_post_div", "pll4_audio", C… in imx6q_clocks_init()
543 …clk[IMX6QDL_CLK_PLL5_POST_DIV] = clk_register_divider_table(NULL, "pll5_post_div", "pll5_video", C… in imx6q_clocks_init()
544 …clk[IMX6QDL_CLK_PLL5_VIDEO_DIV] = clk_register_divider_table(NULL, "pll5_video_div", "pll5_post_di… in imx6q_clocks_init()
Dclk-vf610.c281 …clk[VF610_CLK_PLL4_MAIN_DIV] = clk_register_divider_table(NULL, "pll4_audio_div", "pll4_audio", 0,… in vf610_clocks_init()
/Linux-v4.19/drivers/clk/renesas/
Dclk-r8a7740.c141 return clk_register_divider_table(NULL, name, parent_name, 0, in r8a7740_cpg_register_clock()
Dclk-r8a73a4.c185 return clk_register_divider_table(NULL, name, parent_name, 0, in r8a73a4_cpg_register_clock()
Dclk-sh73a0.c158 return clk_register_divider_table(NULL, name, parent_name, 0, in sh73a0_cpg_register_clock()
Drcar-gen2-cpg.c372 return clk_register_divider_table(NULL, core->name, in rcar_gen2_cpg_clk_register()
Dclk-rcar-gen2.c377 return clk_register_divider_table(NULL, name, parent_name, 0, in rcar_gen2_cpg_register_clock()
/Linux-v4.19/drivers/clk/tegra/
Dclk-divider.c177 return clk_register_divider_table(NULL, name, parent_name, in tegra_clk_register_mc()
Dclk-tegra210.c3127 clk = clk_register_divider_table(NULL, "pll_u_out", "pll_u_vco", 0, in tegra210_pll_init()
3196 clk = clk_register_divider_table(NULL, "pll_re_out", "pll_re_vco", 0, in tegra210_pll_init()
3224 clk = clk_register_divider_table(NULL, "pll_c4_out0", "pll_c4_vco", 0, in tegra210_pll_init()
Dclk-tegra114.c1025 clk = clk_register_divider_table(NULL, "pll_re_out", "pll_re_vco", 0, in tegra114_pll_init()
/Linux-v4.19/drivers/clk/
Dclk-divider.c568 struct clk *clk_register_divider_table(struct device *dev, const char *name, in clk_register_divider_table() function
582 EXPORT_SYMBOL_GPL(clk_register_divider_table);
Dclk-stm32f4.c1515 clk_register_divider_table(NULL, "ahb_div", "sys", in stm32f4_rcc_init()
1519 clk_register_divider_table(NULL, "apb1_div", "ahb_div", in stm32f4_rcc_init()
1525 clk_register_divider_table(NULL, "apb2_div", "ahb_div", in stm32f4_rcc_init()
/Linux-v4.19/drivers/clk/hisilicon/
Dclk.c234 clk = clk_register_divider_table(NULL, clks[i].name, in hisi_clk_register_divider()
/Linux-v4.19/drivers/clk/zte/
Dclk-zx296702.c203 return clk_register_divider_table(NULL, name, parent, 0, reg, shift, in zx_divtbl()
/Linux-v4.19/arch/powerpc/platforms/512x/
Dclock-commonclk.c254 return clk_register_divider_table(NULL, name, parent_name, 0, in mpc512x_clk_divtable()
/Linux-v4.19/drivers/clk/rockchip/
Dclk.c472 clk = clk_register_divider_table(NULL, in rockchip_clk_register_branches()
/Linux-v4.19/include/linux/
Dclk-provider.h466 struct clk *clk_register_divider_table(struct device *dev, const char *name,

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