Searched refs:cdclk_state (Results 1 – 4 of 4) sorted by relevance
55 struct intel_cdclk_state *cdclk_state) in fixed_133mhz_get_cdclk() argument57 cdclk_state->cdclk = 133333; in fixed_133mhz_get_cdclk()61 struct intel_cdclk_state *cdclk_state) in fixed_200mhz_get_cdclk() argument63 cdclk_state->cdclk = 200000; in fixed_200mhz_get_cdclk()67 struct intel_cdclk_state *cdclk_state) in fixed_266mhz_get_cdclk() argument69 cdclk_state->cdclk = 266667; in fixed_266mhz_get_cdclk()73 struct intel_cdclk_state *cdclk_state) in fixed_333mhz_get_cdclk() argument75 cdclk_state->cdclk = 333333; in fixed_333mhz_get_cdclk()79 struct intel_cdclk_state *cdclk_state) in fixed_400mhz_get_cdclk() argument81 cdclk_state->cdclk = 400000; in fixed_400mhz_get_cdclk()[all …]
1473 const struct intel_cdclk_state *cdclk_state);1474 void intel_dump_cdclk_state(const struct intel_cdclk_state *cdclk_state,
795 struct intel_cdclk_state cdclk_state = {}; in gen9_dc_off_power_well_enable() local799 dev_priv->display.get_cdclk(dev_priv, &cdclk_state); in gen9_dc_off_power_well_enable()801 WARN_ON(intel_cdclk_needs_modeset(&dev_priv->cdclk.hw, &cdclk_state)); in gen9_dc_off_power_well_enable()
409 struct intel_cdclk_state *cdclk_state);411 const struct intel_cdclk_state *cdclk_state);
