| /Linux-v4.19/drivers/gpio/ |
| D | gpio-omap.c | 79 void (*set_dataout)(struct gpio_bank *bank, unsigned gpio, int enable);
80 void (*set_dataout_multiple)(struct gpio_bank *bank,
89 #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage) argument
100 static void omap_set_gpio_direction(struct gpio_bank *bank, int gpio, in omap_set_gpio_direction() argument
103 void __iomem *reg = bank->base; in omap_set_gpio_direction()
106 reg += bank->regs->direction; in omap_set_gpio_direction()
113 bank->context.oe = l; in omap_set_gpio_direction()
118 static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, unsigned offset, in omap_set_gpio_dataout_reg() argument
121 void __iomem *reg = bank->base; in omap_set_gpio_dataout_reg()
125 reg += bank->regs->set_dataout; in omap_set_gpio_dataout_reg()
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| D | gpio-brcmstb.c | 36 #define GIO_BANK_OFF(bank, off) (((bank) * GIO_BANK_SIZE) + (off * sizeof(u32))) argument
37 #define GIO_ODEN(bank) GIO_BANK_OFF(bank, GIO_REG_ODEN) argument
38 #define GIO_DATA(bank) GIO_BANK_OFF(bank, GIO_REG_DATA) argument
39 #define GIO_IODIR(bank) GIO_BANK_OFF(bank, GIO_REG_IODIR) argument
40 #define GIO_EC(bank) GIO_BANK_OFF(bank, GIO_REG_EC) argument
41 #define GIO_EI(bank) GIO_BANK_OFF(bank, GIO_REG_EI) argument
42 #define GIO_MASK(bank) GIO_BANK_OFF(bank, GIO_REG_MASK) argument
43 #define GIO_LEVEL(bank) GIO_BANK_OFF(bank, GIO_REG_LEVEL) argument
44 #define GIO_STAT(bank) GIO_BANK_OFF(bank, GIO_REG_STAT) argument
76 struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc); in brcmstb_gpio_gc_to_priv() local
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| D | gpio-tegra.c | 70 unsigned int bank; member
115 static unsigned int tegra_gpio_compose(unsigned int bank, unsigned int port, in tegra_gpio_compose() argument
118 return (bank << 5) | ((port & 0x3) << 3) | (bit & 0x7); in tegra_gpio_compose()
217 struct tegra_gpio_bank *bank = &tgi->bank_info[GPIO_BANK(offset)]; in tegra_gpio_set_debounce() local
234 spin_lock_irqsave(&bank->dbc_lock[port], flags); in tegra_gpio_set_debounce()
235 if (bank->dbc_cnt[port] < debounce_ms) { in tegra_gpio_set_debounce()
237 bank->dbc_cnt[port] = debounce_ms; in tegra_gpio_set_debounce()
239 spin_unlock_irqrestore(&bank->dbc_lock[port], flags); in tegra_gpio_set_debounce()
267 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d); in tegra_gpio_irq_ack() local
268 struct tegra_gpio_info *tgi = bank->tgi; in tegra_gpio_irq_ack()
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| D | gpio-f7188x.c | 68 struct f7188x_gpio_bank *bank; member
229 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); in f7188x_gpio_get_direction() local
230 struct f7188x_sio *sio = bank->data->sio; in f7188x_gpio_get_direction()
238 dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); in f7188x_gpio_get_direction()
248 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); in f7188x_gpio_direction_in() local
249 struct f7188x_sio *sio = bank->data->sio; in f7188x_gpio_direction_in()
257 dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); in f7188x_gpio_direction_in()
259 superio_outb(sio->addr, gpio_dir(bank->regbase), dir); in f7188x_gpio_direction_in()
269 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); in f7188x_gpio_get() local
270 struct f7188x_sio *sio = bank->data->sio; in f7188x_gpio_get()
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| /Linux-v4.19/drivers/pinctrl/sh-pfc/ |
| D | sh_pfc.h | 387 #define PORT_GP_CFG_1(bank, pin, fn, sfx, cfg) \ argument
388 fn(bank, pin, GP_##bank##_##pin, sfx, cfg)
389 #define PORT_GP_1(bank, pin, fn, sfx) PORT_GP_CFG_1(bank, pin, fn, sfx, 0) argument
391 #define PORT_GP_CFG_4(bank, fn, sfx, cfg) \ argument
392 PORT_GP_CFG_1(bank, 0, fn, sfx, cfg), \
393 PORT_GP_CFG_1(bank, 1, fn, sfx, cfg), \
394 PORT_GP_CFG_1(bank, 2, fn, sfx, cfg), \
395 PORT_GP_CFG_1(bank, 3, fn, sfx, cfg)
396 #define PORT_GP_4(bank, fn, sfx) PORT_GP_CFG_4(bank, fn, sfx, 0) argument
398 #define PORT_GP_CFG_6(bank, fn, sfx, cfg) \ argument
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| /Linux-v4.19/drivers/pinctrl/samsung/ |
| D | pinctrl-exynos.c | 54 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_mask() local
55 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_mask()
59 spin_lock_irqsave(&bank->slock, flags); in exynos_irq_mask()
61 mask = readl(bank->eint_base + reg_mask); in exynos_irq_mask()
63 writel(mask, bank->eint_base + reg_mask); in exynos_irq_mask()
65 spin_unlock_irqrestore(&bank->slock, flags); in exynos_irq_mask()
72 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_ack() local
73 unsigned long reg_pend = our_chip->eint_pend + bank->eint_offset; in exynos_irq_ack()
75 writel(1 << irqd->hwirq, bank->eint_base + reg_pend); in exynos_irq_ack()
82 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_unmask() local
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| D | pinctrl-s3c24xx.c | 101 struct samsung_pin_bank *bank; member
139 struct samsung_pin_bank *bank, int pin) in s3c24xx_eint_set_function() argument
141 const struct samsung_pin_bank_type *bank_type = bank->type; in s3c24xx_eint_set_function()
149 reg = d->virt_base + bank->pctl_offset; in s3c24xx_eint_set_function()
153 spin_lock_irqsave(&bank->slock, flags); in s3c24xx_eint_set_function()
157 val |= bank->eint_func << shift; in s3c24xx_eint_set_function()
160 spin_unlock_irqrestore(&bank->slock, flags); in s3c24xx_eint_set_function()
165 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(data); in s3c24xx_eint_type() local
166 struct samsung_pinctrl_drv_data *d = bank->drvdata; in s3c24xx_eint_type()
167 int index = bank->eint_offset + data->hwirq; in s3c24xx_eint_type()
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| D | pinctrl-samsung.c | 358 struct samsung_pin_bank **bank) in pin_to_reg_bank() argument
370 if (bank) in pin_to_reg_bank()
371 *bank = b; in pin_to_reg_bank()
380 struct samsung_pin_bank *bank; in samsung_pinmux_setup() local
392 ®, &pin_offset, &bank); in samsung_pinmux_setup()
393 type = bank->type; in samsung_pinmux_setup()
402 spin_lock_irqsave(&bank->slock, flags); in samsung_pinmux_setup()
409 spin_unlock_irqrestore(&bank->slock, flags); in samsung_pinmux_setup()
435 struct samsung_pin_bank *bank; in samsung_pinconf_rw() local
444 &pin_offset, &bank); in samsung_pinconf_rw()
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| D | pinctrl-s3c64xx.c | 213 struct samsung_pin_bank *bank; member
268 struct samsung_pin_bank *bank, int pin) in s3c64xx_irq_set_function() argument
270 const struct samsung_pin_bank_type *bank_type = bank->type; in s3c64xx_irq_set_function()
278 reg = d->virt_base + bank->pctl_offset; in s3c64xx_irq_set_function()
289 spin_lock_irqsave(&bank->slock, flags); in s3c64xx_irq_set_function()
293 val |= bank->eint_func << shift; in s3c64xx_irq_set_function()
296 spin_unlock_irqrestore(&bank->slock, flags); in s3c64xx_irq_set_function()
305 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in s3c64xx_gpio_irq_set_mask() local
306 struct samsung_pinctrl_drv_data *d = bank->drvdata; in s3c64xx_gpio_irq_set_mask()
307 unsigned char index = EINT_OFFS(bank->eint_offset) + irqd->hwirq; in s3c64xx_gpio_irq_set_mask()
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| /Linux-v4.19/drivers/crypto/qat/qat_common/ |
| D | adf_transport.c | 80 static int adf_reserve_ring(struct adf_etr_bank_data *bank, uint32_t ring) in adf_reserve_ring() argument
82 spin_lock(&bank->lock); in adf_reserve_ring()
83 if (bank->ring_mask & (1 << ring)) { in adf_reserve_ring()
84 spin_unlock(&bank->lock); in adf_reserve_ring()
87 bank->ring_mask |= (1 << ring); in adf_reserve_ring()
88 spin_unlock(&bank->lock); in adf_reserve_ring()
92 static void adf_unreserve_ring(struct adf_etr_bank_data *bank, uint32_t ring) in adf_unreserve_ring() argument
94 spin_lock(&bank->lock); in adf_unreserve_ring()
95 bank->ring_mask &= ~(1 << ring); in adf_unreserve_ring()
96 spin_unlock(&bank->lock); in adf_unreserve_ring()
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| D | adf_transport_access_macros.h | 121 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ argument
122 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
124 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ argument
125 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
127 #define READ_CSR_E_STAT(csr_base_addr, bank) \ argument
128 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
130 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \ argument
131 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
133 #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \ argument
138 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
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| D | adf_transport_debug.c | 88 struct adf_etr_bank_data *bank = ring->bank; in adf_ring_show() local
89 void __iomem *csr = ring->bank->csr_addr; in adf_ring_show()
94 head = READ_CSR_RING_HEAD(csr, bank->bank_number, in adf_ring_show()
96 tail = READ_CSR_RING_TAIL(csr, bank->bank_number, in adf_ring_show()
98 empty = READ_CSR_E_STAT(csr, bank->bank_number); in adf_ring_show()
104 ring->ring_number, ring->bank->bank_number); in adf_ring_show()
164 ring->bank->bank_debug_dir, in adf_ring_debugfs_add()
206 struct adf_etr_bank_data *bank = sfile->private; in adf_bank_show() local
210 bank->bank_number); in adf_bank_show()
213 struct adf_etr_ring_data *ring = &bank->rings[ring_id]; in adf_bank_show()
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| /Linux-v4.19/drivers/pinctrl/stm32/ |
| D | pinctrl-stm32.c | 131 static inline void __stm32_gpio_set(struct stm32_gpio_bank *bank, in __stm32_gpio_set() argument
137 clk_enable(bank->clk); in __stm32_gpio_set()
139 writel_relaxed(BIT(offset), bank->base + STM32_GPIO_BSRR); in __stm32_gpio_set()
141 clk_disable(bank->clk); in __stm32_gpio_set()
146 struct stm32_gpio_bank *bank = gpiochip_get_data(chip); in stm32_gpio_request() local
147 struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent); in stm32_gpio_request()
149 int pin = offset + (bank->bank_nr * STM32_GPIO_PINS_PER_BANK); in stm32_gpio_request()
167 struct stm32_gpio_bank *bank = gpiochip_get_data(chip); in stm32_gpio_get() local
170 clk_enable(bank->clk); in stm32_gpio_get()
172 ret = !!(readl_relaxed(bank->base + STM32_GPIO_IDR) & BIT(offset)); in stm32_gpio_get()
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| /Linux-v4.19/drivers/pinctrl/ |
| D | pinctrl-rockchip.c | 343 void (*pull_calc_reg)(struct rockchip_pin_bank *bank,
346 void (*drv_calc_reg)(struct rockchip_pin_bank *bank,
349 int (*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
682 static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin, in rockchip_get_recalced_mux() argument
685 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_recalced_mux()
692 if (data->num == bank->bank_num && in rockchip_get_recalced_mux()
1093 static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin, in rockchip_get_mux_route() argument
1096 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_mux_route()
1103 if ((data->bank_num == bank->bank_num) && in rockchip_get_mux_route()
1117 static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin) in rockchip_get_mux() argument
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| D | pinctrl-oxnas.c | 38 #define GPIO_BANK_START(bank) ((bank) * PINS_PER_BANK) argument
79 unsigned int bank; member
283 .bank = _pin / PINS_PER_BANK, \
609 fname, pg->bank, pg->pin, in oxnas_ox810se_pinmux_enable()
613 (pg->bank ? in oxnas_ox810se_pinmux_enable()
620 (pg->bank ? in oxnas_ox810se_pinmux_enable()
627 (pg->bank ? in oxnas_ox810se_pinmux_enable()
653 unsigned int offset = (pg->bank ? PINMUX_820_BANK_OFFSET : 0); in oxnas_ox820_pinmux_enable()
660 fname, pg->bank, pg->pin, in oxnas_ox820_pinmux_enable()
705 struct oxnas_gpio_bank *bank = gpiochip_get_data(range->gc); in oxnas_ox810se_gpio_request_enable() local
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| /Linux-v4.19/arch/arm/mach-s3c24xx/ |
| D | iotiming-s3c2412.c | 41 unsigned int bank; in s3c2412_print_timing() local
43 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2412_print_timing()
44 bt = iot->bank[bank].io_2412; in s3c2412_print_timing()
49 "wstoen=%d.%d wstwen=%d.%d wstbrd=%d.%d\n", pfx, bank, in s3c2412_print_timing()
142 int bank; in s3c2412_iotiming_calc() local
145 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2412_iotiming_calc()
146 bt = iot->bank[bank].io_2412; in s3c2412_iotiming_calc()
153 __func__, bank); in s3c2412_iotiming_calc()
176 int bank; in s3c2412_iotiming_set() local
180 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2412_iotiming_set()
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| D | iotiming-s3c2410.c | 35 int bank; in s3c2410_print_timing() local
37 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2410_print_timing()
38 bt = timings->bank[bank].io_2410; in s3c2410_print_timing()
43 "Tcoh=%d.%d, Tcah=%d.%d\n", pfx, bank, in s3c2410_print_timing()
56 static inline void __iomem *bank_reg(unsigned int bank) in bank_reg() argument
58 return S3C2410_BANKCON0 + (bank << 2); in bank_reg()
362 int bank; in s3c2410_iotiming_calc() local
365 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2410_iotiming_calc()
366 bankcon = __raw_readl(bank_reg(bank)); in s3c2410_iotiming_calc()
367 bt = iot->bank[bank].io_2410; in s3c2410_iotiming_calc()
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| /Linux-v4.19/arch/x86/kernel/cpu/mcheck/ |
| D | mce_amd.c | 119 static enum smca_bank_types smca_get_bank_type(unsigned int bank) in smca_get_bank_type() argument
123 if (bank >= MAX_NR_BANKS) in smca_get_bank_type()
126 b = &smca_banks[bank]; in smca_get_bank_type()
192 static void smca_configure(unsigned int bank, unsigned int cpu) in smca_configure() argument
197 u32 smca_config = MSR_AMD64_SMCA_MCx_CONFIG(bank); in smca_configure()
230 if (smca_banks[bank].hwid) in smca_configure()
233 if (rdmsr_safe_on_cpu(cpu, MSR_AMD64_SMCA_MCx_IPID(bank), &low, &high)) { in smca_configure()
234 pr_warn("Failed to read MCA_IPID for bank %d\n", bank); in smca_configure()
244 smca_banks[bank].hwid = s_hwid; in smca_configure()
245 smca_banks[bank].id = low; in smca_configure()
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| /Linux-v4.19/arch/unicore32/include/asm/ |
| D | memblock.h | 29 struct membank bank[NR_BANKS]; member
37 #define bank_pfn_start(bank) __phys_to_pfn((bank)->start) argument
38 #define bank_pfn_end(bank) __phys_to_pfn((bank)->start + (bank)->size) argument
39 #define bank_pfn_size(bank) ((bank)->size >> PAGE_SHIFT) argument
40 #define bank_phys_start(bank) ((bank)->start) argument
41 #define bank_phys_end(bank) ((bank)->start + (bank)->size) argument
42 #define bank_phys_size(bank) ((bank)->size) argument
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| /Linux-v4.19/drivers/bus/ |
| D | uniphier-system-bus.c | 44 struct uniphier_system_bus_bank bank[UNIPHIER_SBC_NR_BANKS]; member
48 int bank, u32 addr, u64 paddr, u32 size) in uniphier_system_bus_add_bank() argument
54 bank, addr, paddr, size); in uniphier_system_bus_add_bank()
56 if (bank >= ARRAY_SIZE(priv->bank)) { in uniphier_system_bus_add_bank()
57 dev_err(priv->dev, "unsupported bank number %d\n", bank); in uniphier_system_bus_add_bank()
61 if (priv->bank[bank].base || priv->bank[bank].end) { in uniphier_system_bus_add_bank()
63 "range for bank %d has already been specified\n", bank); in uniphier_system_bus_add_bank()
95 priv->bank[bank].base = paddr; in uniphier_system_bus_add_bank()
96 priv->bank[bank].end = end; in uniphier_system_bus_add_bank()
99 bank, priv->bank[bank].base, priv->bank[bank].end); in uniphier_system_bus_add_bank()
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| /Linux-v4.19/drivers/dma/ipu/ |
| D | ipu_irq.c | 75 struct ipu_irq_bank *bank; member
99 struct ipu_irq_bank *bank; in ipu_irq_unmask() local
105 bank = map->bank; in ipu_irq_unmask()
106 if (!bank) { in ipu_irq_unmask()
112 reg = ipu_read_reg(bank->ipu, bank->control); in ipu_irq_unmask()
114 ipu_write_reg(bank->ipu, reg, bank->control); in ipu_irq_unmask()
122 struct ipu_irq_bank *bank; in ipu_irq_mask() local
128 bank = map->bank; in ipu_irq_mask()
129 if (!bank) { in ipu_irq_mask()
135 reg = ipu_read_reg(bank->ipu, bank->control); in ipu_irq_mask()
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| /Linux-v4.19/arch/mips/sgi-ip22/ |
| D | ip22-mc.c | 37 static inline unsigned int get_bank_config(int bank) in get_bank_config() argument
39 unsigned int res = bank > 1 ? sgimc->mconfig1 : sgimc->mconfig0; in get_bank_config()
40 return bank % 2 ? res & 0xffff : res >> 16; in get_bank_config()
54 struct mem bank[4]; in probe_memory() local
58 for (i = 0; i < ARRAY_SIZE(bank); i++) { in probe_memory()
63 bank[cnt].size = get_bank_size(tmp); in probe_memory()
64 bank[cnt].addr = get_bank_addr(tmp); in probe_memory()
66 i, bank[cnt].size / 1024 / 1024, bank[cnt].addr); in probe_memory()
76 if (bank[i-1].addr > bank[i].addr) { in probe_memory()
77 addr = bank[i].addr; in probe_memory()
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| /Linux-v4.19/sound/pci/au88x0/ |
| D | au88x0_wt.h | 21 #define WT_CTRL(bank) (((((bank)&1)<<0xd) + 0x00)<<2) /* 0x0000 */ argument
22 #define WT_SRAMP(bank) (((((bank)&1)<<0xd) + 0x01)<<2) /* 0x0004 */ argument
23 #define WT_DSREG(bank) (((((bank)&1)<<0xd) + 0x02)<<2) /* 0x0008 */ argument
24 #define WT_MRAMP(bank) (((((bank)&1)<<0xd) + 0x03)<<2) /* 0x000c */ argument
25 #define WT_GMODE(bank) (((((bank)&1)<<0xd) + 0x04)<<2) /* 0x0010 */ argument
26 #define WT_ARAMP(bank) (((((bank)&1)<<0xd) + 0x05)<<2) /* 0x0014 */ argument
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| /Linux-v4.19/drivers/pinctrl/sunxi/ |
| D | pinctrl-sunxi.h | 32 #define SUNXI_PINCTRL_PIN(bank, pin) \ argument
33 PINCTRL_PIN(P ## bank ## _BASE + (pin), "P" #bank #pin)
208 u8 bank = pin / PINS_PER_BANK; in sunxi_mux_reg() local
209 u32 offset = bank * BANK_MEM_SIZE; in sunxi_mux_reg()
223 u8 bank = pin / PINS_PER_BANK; in sunxi_data_reg() local
224 u32 offset = bank * BANK_MEM_SIZE; in sunxi_data_reg()
238 u8 bank = pin / PINS_PER_BANK; in sunxi_dlevel_reg() local
239 u32 offset = bank * BANK_MEM_SIZE; in sunxi_dlevel_reg()
253 u8 bank = pin / PINS_PER_BANK; in sunxi_pull_reg() local
254 u32 offset = bank * BANK_MEM_SIZE; in sunxi_pull_reg()
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| /Linux-v4.19/drivers/leds/ |
| D | leds-tca6507.c | 170 struct bank { struct
175 } bank[3]; member
186 int bank; /* Bank used, or -1 */ member
292 static void set_code(struct tca6507_chip *tca, int reg, int bank, int new) in set_code() argument
296 if (bank) { in set_code()
309 static void set_level(struct tca6507_chip *tca, int bank, int level) in set_level() argument
311 switch (bank) { in set_level()
314 set_code(tca, TCA6507_MAX_INTENSITY, bank, level); in set_level()
320 tca->bank[bank].level = level; in set_level()
324 static void set_times(struct tca6507_chip *tca, int bank) in set_times() argument
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