Lines Matching refs:bank
343 void (*pull_calc_reg)(struct rockchip_pin_bank *bank,
346 void (*drv_calc_reg)(struct rockchip_pin_bank *bank,
349 int (*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
682 static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin, in rockchip_get_recalced_mux() argument
685 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_recalced_mux()
692 if (data->num == bank->bank_num && in rockchip_get_recalced_mux()
1093 static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin, in rockchip_get_mux_route() argument
1096 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_mux_route()
1103 if ((data->bank_num == bank->bank_num) && in rockchip_get_mux_route()
1117 static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin) in rockchip_get_mux() argument
1119 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_mux()
1129 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { in rockchip_get_mux()
1134 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) in rockchip_get_mux()
1137 regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rockchip_get_mux()
1141 mux_type = bank->iomux[iomux_num].type; in rockchip_get_mux()
1142 reg = bank->iomux[iomux_num].offset; in rockchip_get_mux()
1158 if (bank->recalced_mask & BIT(pin)) in rockchip_get_mux()
1159 rockchip_get_recalced_mux(bank, pin, ®, &bit, &mask); in rockchip_get_mux()
1168 static int rockchip_verify_mux(struct rockchip_pin_bank *bank, in rockchip_verify_mux() argument
1171 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_verify_mux()
1177 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { in rockchip_verify_mux()
1182 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) { in rockchip_verify_mux()
1206 static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) in rockchip_set_mux() argument
1208 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_mux()
1215 ret = rockchip_verify_mux(bank, pin, mux); in rockchip_set_mux()
1219 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) in rockchip_set_mux()
1223 bank->bank_num, pin, mux); in rockchip_set_mux()
1225 regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rockchip_set_mux()
1229 mux_type = bank->iomux[iomux_num].type; in rockchip_set_mux()
1230 reg = bank->iomux[iomux_num].offset; in rockchip_set_mux()
1246 if (bank->recalced_mask & BIT(pin)) in rockchip_set_mux()
1247 rockchip_get_recalced_mux(bank, pin, ®, &bit, &mask); in rockchip_set_mux()
1249 if (bank->route_mask & BIT(pin)) { in rockchip_set_mux()
1250 if (rockchip_get_mux_route(bank, pin, mux, &route_reg, in rockchip_set_mux()
1272 static void px30_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in px30_calc_pull_reg_and_bit() argument
1276 struct rockchip_pinctrl *info = bank->drvdata; in px30_calc_pull_reg_and_bit()
1279 if (bank->bank_num == 0) { in px30_calc_pull_reg_and_bit()
1288 *reg += bank->bank_num * PX30_PULL_BANK_STRIDE; in px30_calc_pull_reg_and_bit()
1302 static void px30_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, in px30_calc_drv_reg_and_bit() argument
1306 struct rockchip_pinctrl *info = bank->drvdata; in px30_calc_drv_reg_and_bit()
1309 if (bank->bank_num == 0) { in px30_calc_drv_reg_and_bit()
1318 *reg += bank->bank_num * PX30_DRV_BANK_STRIDE; in px30_calc_drv_reg_and_bit()
1332 static int px30_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank, in px30_calc_schmitt_reg_and_bit() argument
1337 struct rockchip_pinctrl *info = bank->drvdata; in px30_calc_schmitt_reg_and_bit()
1340 if (bank->bank_num == 0) { in px30_calc_schmitt_reg_and_bit()
1348 *reg += (bank->bank_num - 1) * PX30_SCHMITT_BANK_STRIDE; in px30_calc_schmitt_reg_and_bit()
1363 static void rv1108_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in rv1108_calc_pull_reg_and_bit() argument
1367 struct rockchip_pinctrl *info = bank->drvdata; in rv1108_calc_pull_reg_and_bit()
1370 if (bank->bank_num == 0) { in rv1108_calc_pull_reg_and_bit()
1378 *reg += bank->bank_num * RV1108_PULL_BANK_STRIDE; in rv1108_calc_pull_reg_and_bit()
1392 static void rv1108_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, in rv1108_calc_drv_reg_and_bit() argument
1396 struct rockchip_pinctrl *info = bank->drvdata; in rv1108_calc_drv_reg_and_bit()
1399 if (bank->bank_num == 0) { in rv1108_calc_drv_reg_and_bit()
1408 *reg += bank->bank_num * RV1108_DRV_BANK_STRIDE; in rv1108_calc_drv_reg_and_bit()
1422 static int rv1108_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank, in rv1108_calc_schmitt_reg_and_bit() argument
1427 struct rockchip_pinctrl *info = bank->drvdata; in rv1108_calc_schmitt_reg_and_bit()
1430 if (bank->bank_num == 0) { in rv1108_calc_schmitt_reg_and_bit()
1438 *reg += (bank->bank_num - 1) * RV1108_SCHMITT_BANK_STRIDE; in rv1108_calc_schmitt_reg_and_bit()
1450 static void rk2928_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in rk2928_calc_pull_reg_and_bit() argument
1454 struct rockchip_pinctrl *info = bank->drvdata; in rk2928_calc_pull_reg_and_bit()
1458 *reg += bank->bank_num * RK2928_PULL_BANK_STRIDE; in rk2928_calc_pull_reg_and_bit()
1466 static void rk3128_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in rk3128_calc_pull_reg_and_bit() argument
1470 struct rockchip_pinctrl *info = bank->drvdata; in rk3128_calc_pull_reg_and_bit()
1474 *reg += bank->bank_num * RK2928_PULL_BANK_STRIDE; in rk3128_calc_pull_reg_and_bit()
1486 static void rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in rk3188_calc_pull_reg_and_bit() argument
1490 struct rockchip_pinctrl *info = bank->drvdata; in rk3188_calc_pull_reg_and_bit()
1493 if (bank->bank_num == 0 && pin_num < 12) { in rk3188_calc_pull_reg_and_bit()
1495 : bank->regmap_pull; in rk3188_calc_pull_reg_and_bit()
1507 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3188_calc_pull_reg_and_bit()
1521 static void rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in rk3288_calc_pull_reg_and_bit() argument
1525 struct rockchip_pinctrl *info = bank->drvdata; in rk3288_calc_pull_reg_and_bit()
1528 if (bank->bank_num == 0) { in rk3288_calc_pull_reg_and_bit()
1541 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3288_calc_pull_reg_and_bit()
1555 static void rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, in rk3288_calc_drv_reg_and_bit() argument
1559 struct rockchip_pinctrl *info = bank->drvdata; in rk3288_calc_drv_reg_and_bit()
1562 if (bank->bank_num == 0) { in rk3288_calc_drv_reg_and_bit()
1575 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3288_calc_drv_reg_and_bit()
1585 static void rk3228_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in rk3228_calc_pull_reg_and_bit() argument
1589 struct rockchip_pinctrl *info = bank->drvdata; in rk3228_calc_pull_reg_and_bit()
1593 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3228_calc_pull_reg_and_bit()
1602 static void rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, in rk3228_calc_drv_reg_and_bit() argument
1606 struct rockchip_pinctrl *info = bank->drvdata; in rk3228_calc_drv_reg_and_bit()
1610 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3228_calc_drv_reg_and_bit()
1620 static void rk3368_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in rk3368_calc_pull_reg_and_bit() argument
1624 struct rockchip_pinctrl *info = bank->drvdata; in rk3368_calc_pull_reg_and_bit()
1627 if (bank->bank_num == 0) { in rk3368_calc_pull_reg_and_bit()
1640 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3368_calc_pull_reg_and_bit()
1651 static void rk3368_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, in rk3368_calc_drv_reg_and_bit() argument
1655 struct rockchip_pinctrl *info = bank->drvdata; in rk3368_calc_drv_reg_and_bit()
1658 if (bank->bank_num == 0) { in rk3368_calc_drv_reg_and_bit()
1671 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3368_calc_drv_reg_and_bit()
1683 static void rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in rk3399_calc_pull_reg_and_bit() argument
1687 struct rockchip_pinctrl *info = bank->drvdata; in rk3399_calc_pull_reg_and_bit()
1690 if ((bank->bank_num == 0) || (bank->bank_num == 1)) { in rk3399_calc_pull_reg_and_bit()
1694 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3399_calc_pull_reg_and_bit()
1705 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3399_calc_pull_reg_and_bit()
1713 static void rk3399_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, in rk3399_calc_drv_reg_and_bit() argument
1717 struct rockchip_pinctrl *info = bank->drvdata; in rk3399_calc_drv_reg_and_bit()
1721 if ((bank->bank_num == 0) || (bank->bank_num == 1)) in rk3399_calc_drv_reg_and_bit()
1726 *reg = bank->drv[drv_num].offset; in rk3399_calc_drv_reg_and_bit()
1727 if ((bank->drv[drv_num].drv_type == DRV_TYPE_IO_1V8_3V0_AUTO) || in rk3399_calc_drv_reg_and_bit()
1728 (bank->drv[drv_num].drv_type == DRV_TYPE_IO_3V3_ONLY)) in rk3399_calc_drv_reg_and_bit()
1742 static int rockchip_get_drive_perpin(struct rockchip_pin_bank *bank, in rockchip_get_drive_perpin() argument
1745 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_drive_perpin()
1751 int drv_type = bank->drv[pin_num / 8].drv_type; in rockchip_get_drive_perpin()
1753 ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_get_drive_perpin()
1819 static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank, in rockchip_set_drive_perpin() argument
1822 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_drive_perpin()
1828 int drv_type = bank->drv[pin_num / 8].drv_type; in rockchip_set_drive_perpin()
1831 bank->bank_num, pin_num, strength); in rockchip_set_drive_perpin()
1833 ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_set_drive_perpin()
1928 static int rockchip_get_pull(struct rockchip_pin_bank *bank, int pin_num) in rockchip_get_pull() argument
1930 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_pull()
1941 ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_get_pull()
1959 pull_type = bank->pull_type[pin_num / 8]; in rockchip_get_pull()
1970 static int rockchip_set_pull(struct rockchip_pin_bank *bank, in rockchip_set_pull() argument
1973 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_pull()
1981 bank->bank_num, pin_num, pull); in rockchip_set_pull()
1987 ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_set_pull()
2003 pull_type = bank->pull_type[pin_num / 8]; in rockchip_set_pull()
2039 static int rk3328_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank, in rk3328_calc_schmitt_reg_and_bit() argument
2044 struct rockchip_pinctrl *info = bank->drvdata; in rk3328_calc_schmitt_reg_and_bit()
2049 *reg += bank->bank_num * RK3328_SCHMITT_BANK_STRIDE; in rk3328_calc_schmitt_reg_and_bit()
2056 static int rockchip_get_schmitt(struct rockchip_pin_bank *bank, int pin_num) in rockchip_get_schmitt() argument
2058 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_schmitt()
2065 ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_get_schmitt()
2077 static int rockchip_set_schmitt(struct rockchip_pin_bank *bank, in rockchip_set_schmitt() argument
2080 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_schmitt()
2088 bank->bank_num, pin_num, enable); in rockchip_set_schmitt()
2090 ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_set_schmitt()
2138 struct rockchip_pin_bank *bank; in rockchip_pmx_set() local
2149 bank = pin_to_bank(info, pins[cnt]); in rockchip_pmx_set()
2150 ret = rockchip_set_mux(bank, pins[cnt] - bank->pin_base, in rockchip_pmx_set()
2159 rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0); in rockchip_pmx_set()
2169 struct rockchip_pin_bank *bank = gpiochip_get_data(chip); in rockchip_gpio_get_direction() local
2173 ret = clk_enable(bank->clk); in rockchip_gpio_get_direction()
2175 dev_err(bank->drvdata->dev, in rockchip_gpio_get_direction()
2176 "failed to enable clock for bank %s\n", bank->name); in rockchip_gpio_get_direction()
2179 data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR); in rockchip_gpio_get_direction()
2180 clk_disable(bank->clk); in rockchip_gpio_get_direction()
2193 struct rockchip_pin_bank *bank; in _rockchip_pmx_gpio_set_direction() local
2198 bank = gpiochip_get_data(chip); in _rockchip_pmx_gpio_set_direction()
2200 ret = rockchip_set_mux(bank, pin, RK_FUNC_GPIO); in _rockchip_pmx_gpio_set_direction()
2204 clk_enable(bank->clk); in _rockchip_pmx_gpio_set_direction()
2205 raw_spin_lock_irqsave(&bank->slock, flags); in _rockchip_pmx_gpio_set_direction()
2207 data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR); in _rockchip_pmx_gpio_set_direction()
2213 writel_relaxed(data, bank->reg_base + GPIO_SWPORT_DDR); in _rockchip_pmx_gpio_set_direction()
2215 raw_spin_unlock_irqrestore(&bank->slock, flags); in _rockchip_pmx_gpio_set_direction()
2216 clk_disable(bank->clk); in _rockchip_pmx_gpio_set_direction()
2280 struct rockchip_pin_bank *bank = pin_to_bank(info, pin); in rockchip_pinconf_set() local
2292 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
2307 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
2313 rockchip_gpio_set(&bank->gpio_chip, in rockchip_pinconf_set()
2314 pin - bank->pin_base, arg); in rockchip_pinconf_set()
2315 rc = _rockchip_pmx_gpio_set_direction(&bank->gpio_chip, in rockchip_pinconf_set()
2316 pin - bank->pin_base, false); in rockchip_pinconf_set()
2325 rc = rockchip_set_drive_perpin(bank, in rockchip_pinconf_set()
2326 pin - bank->pin_base, arg); in rockchip_pinconf_set()
2334 rc = rockchip_set_schmitt(bank, in rockchip_pinconf_set()
2335 pin - bank->pin_base, arg); in rockchip_pinconf_set()
2353 struct rockchip_pin_bank *bank = pin_to_bank(info, pin); in rockchip_pinconf_get() local
2360 if (rockchip_get_pull(bank, pin - bank->pin_base) != param) in rockchip_pinconf_get()
2372 if (rockchip_get_pull(bank, pin - bank->pin_base) != param) in rockchip_pinconf_get()
2378 rc = rockchip_get_mux(bank, pin - bank->pin_base); in rockchip_pinconf_get()
2382 rc = rockchip_gpio_get(&bank->gpio_chip, pin - bank->pin_base); in rockchip_pinconf_get()
2393 rc = rockchip_get_drive_perpin(bank, pin - bank->pin_base); in rockchip_pinconf_get()
2403 rc = rockchip_get_schmitt(bank, pin - bank->pin_base); in rockchip_pinconf_get()
2450 struct rockchip_pin_bank *bank; in rockchip_pinctrl_parse_groups() local
2490 bank = bank_num_to_bank(info, num); in rockchip_pinctrl_parse_groups()
2491 if (IS_ERR(bank)) in rockchip_pinctrl_parse_groups()
2492 return PTR_ERR(bank); in rockchip_pinctrl_parse_groups()
2494 grp->pins[j] = bank->pin_base + be32_to_cpu(*list++); in rockchip_pinctrl_parse_groups()
2601 int pin, bank, ret; in rockchip_pinctrl_register() local
2620 for (bank = 0 , k = 0; bank < info->ctrl->nr_banks; bank++) { in rockchip_pinctrl_register()
2621 pin_bank = &info->ctrl->pin_banks[bank]; in rockchip_pinctrl_register()
2640 for (bank = 0; bank < info->ctrl->nr_banks; ++bank) { in rockchip_pinctrl_register()
2641 pin_bank = &info->ctrl->pin_banks[bank]; in rockchip_pinctrl_register()
2643 pin_bank->grange.id = bank; in rockchip_pinctrl_register()
2660 struct rockchip_pin_bank *bank = gpiochip_get_data(gc); in rockchip_gpio_set() local
2661 void __iomem *reg = bank->reg_base + GPIO_SWPORT_DR; in rockchip_gpio_set()
2665 clk_enable(bank->clk); in rockchip_gpio_set()
2666 raw_spin_lock_irqsave(&bank->slock, flags); in rockchip_gpio_set()
2674 raw_spin_unlock_irqrestore(&bank->slock, flags); in rockchip_gpio_set()
2675 clk_disable(bank->clk); in rockchip_gpio_set()
2684 struct rockchip_pin_bank *bank = gpiochip_get_data(gc); in rockchip_gpio_get() local
2687 clk_enable(bank->clk); in rockchip_gpio_get()
2688 data = readl(bank->reg_base + GPIO_EXT_PORT); in rockchip_gpio_get()
2689 clk_disable(bank->clk); in rockchip_gpio_get()
2720 struct rockchip_pin_bank *bank = gpiochip_get_data(gc); in rockchip_gpio_set_debounce() local
2721 void __iomem *reg = bank->reg_base + GPIO_DEBOUNCE; in rockchip_gpio_set_debounce()
2725 clk_enable(bank->clk); in rockchip_gpio_set_debounce()
2726 raw_spin_lock_irqsave(&bank->slock, flags); in rockchip_gpio_set_debounce()
2735 raw_spin_unlock_irqrestore(&bank->slock, flags); in rockchip_gpio_set_debounce()
2736 clk_disable(bank->clk); in rockchip_gpio_set_debounce()
2774 struct rockchip_pin_bank *bank = gpiochip_get_data(gc); in rockchip_gpio_to_irq() local
2777 if (!bank->domain) in rockchip_gpio_to_irq()
2780 virq = irq_create_mapping(bank->domain, offset); in rockchip_gpio_to_irq()
2805 struct rockchip_pin_bank *bank = irq_desc_get_handler_data(desc); in rockchip_irq_demux() local
2808 dev_dbg(bank->drvdata->dev, "got irq for bank %s\n", bank->name); in rockchip_irq_demux()
2812 pend = readl_relaxed(bank->reg_base + GPIO_INT_STATUS); in rockchip_irq_demux()
2819 virq = irq_linear_revmap(bank->domain, irq); in rockchip_irq_demux()
2822 dev_err(bank->drvdata->dev, "unmapped irq %d\n", irq); in rockchip_irq_demux()
2826 dev_dbg(bank->drvdata->dev, "handling irq %d\n", irq); in rockchip_irq_demux()
2832 if (bank->toggle_edge_mode & BIT(irq)) { in rockchip_irq_demux()
2836 data = readl_relaxed(bank->reg_base + GPIO_EXT_PORT); in rockchip_irq_demux()
2838 raw_spin_lock_irqsave(&bank->slock, flags); in rockchip_irq_demux()
2840 polarity = readl_relaxed(bank->reg_base + in rockchip_irq_demux()
2847 bank->reg_base + GPIO_INT_POLARITY); in rockchip_irq_demux()
2849 raw_spin_unlock_irqrestore(&bank->slock, flags); in rockchip_irq_demux()
2852 data = readl_relaxed(bank->reg_base + in rockchip_irq_demux()
2866 struct rockchip_pin_bank *bank = gc->private; in rockchip_irq_set_type() local
2875 ret = rockchip_set_mux(bank, d->hwirq, RK_FUNC_GPIO); in rockchip_irq_set_type()
2879 clk_enable(bank->clk); in rockchip_irq_set_type()
2880 raw_spin_lock_irqsave(&bank->slock, flags); in rockchip_irq_set_type()
2882 data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR); in rockchip_irq_set_type()
2884 writel_relaxed(data, bank->reg_base + GPIO_SWPORT_DDR); in rockchip_irq_set_type()
2886 raw_spin_unlock_irqrestore(&bank->slock, flags); in rockchip_irq_set_type()
2893 raw_spin_lock_irqsave(&bank->slock, flags); in rockchip_irq_set_type()
2901 bank->toggle_edge_mode |= mask; in rockchip_irq_set_type()
2908 data = readl(bank->reg_base + GPIO_EXT_PORT); in rockchip_irq_set_type()
2915 bank->toggle_edge_mode &= ~mask; in rockchip_irq_set_type()
2920 bank->toggle_edge_mode &= ~mask; in rockchip_irq_set_type()
2925 bank->toggle_edge_mode &= ~mask; in rockchip_irq_set_type()
2930 bank->toggle_edge_mode &= ~mask; in rockchip_irq_set_type()
2936 raw_spin_unlock_irqrestore(&bank->slock, flags); in rockchip_irq_set_type()
2937 clk_disable(bank->clk); in rockchip_irq_set_type()
2945 raw_spin_unlock_irqrestore(&bank->slock, flags); in rockchip_irq_set_type()
2946 clk_disable(bank->clk); in rockchip_irq_set_type()
2954 struct rockchip_pin_bank *bank = gc->private; in rockchip_irq_suspend() local
2956 clk_enable(bank->clk); in rockchip_irq_suspend()
2957 bank->saved_masks = irq_reg_readl(gc, GPIO_INTMASK); in rockchip_irq_suspend()
2959 clk_disable(bank->clk); in rockchip_irq_suspend()
2965 struct rockchip_pin_bank *bank = gc->private; in rockchip_irq_resume() local
2967 clk_enable(bank->clk); in rockchip_irq_resume()
2968 irq_reg_writel(gc, bank->saved_masks, GPIO_INTMASK); in rockchip_irq_resume()
2969 clk_disable(bank->clk); in rockchip_irq_resume()
2975 struct rockchip_pin_bank *bank = gc->private; in rockchip_irq_enable() local
2977 clk_enable(bank->clk); in rockchip_irq_enable()
2984 struct rockchip_pin_bank *bank = gc->private; in rockchip_irq_disable() local
2987 clk_disable(bank->clk); in rockchip_irq_disable()
2994 struct rockchip_pin_bank *bank = ctrl->pin_banks; in rockchip_interrupts_register() local
3000 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_interrupts_register()
3001 if (!bank->valid) { in rockchip_interrupts_register()
3003 bank->name); in rockchip_interrupts_register()
3007 ret = clk_enable(bank->clk); in rockchip_interrupts_register()
3010 bank->name); in rockchip_interrupts_register()
3014 bank->domain = irq_domain_add_linear(bank->of_node, 32, in rockchip_interrupts_register()
3016 if (!bank->domain) { in rockchip_interrupts_register()
3018 bank->name); in rockchip_interrupts_register()
3019 clk_disable(bank->clk); in rockchip_interrupts_register()
3023 ret = irq_alloc_domain_generic_chips(bank->domain, 32, 1, in rockchip_interrupts_register()
3028 bank->name); in rockchip_interrupts_register()
3029 irq_domain_remove(bank->domain); in rockchip_interrupts_register()
3030 clk_disable(bank->clk); in rockchip_interrupts_register()
3039 writel_relaxed(0xffffffff, bank->reg_base + GPIO_INTMASK); in rockchip_interrupts_register()
3040 writel_relaxed(0xffffffff, bank->reg_base + GPIO_INTEN); in rockchip_interrupts_register()
3042 gc = irq_get_domain_generic_chip(bank->domain, 0); in rockchip_interrupts_register()
3043 gc->reg_base = bank->reg_base; in rockchip_interrupts_register()
3044 gc->private = bank; in rockchip_interrupts_register()
3056 gc->wake_enabled = IRQ_MSK(bank->nr_pins); in rockchip_interrupts_register()
3058 irq_set_chained_handler_and_data(bank->irq, in rockchip_interrupts_register()
3059 rockchip_irq_demux, bank); in rockchip_interrupts_register()
3063 irq_create_mapping(bank->domain, j); in rockchip_interrupts_register()
3065 clk_disable(bank->clk); in rockchip_interrupts_register()
3075 struct rockchip_pin_bank *bank = ctrl->pin_banks; in rockchip_gpiolib_register() local
3080 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_gpiolib_register()
3081 if (!bank->valid) { in rockchip_gpiolib_register()
3083 bank->name); in rockchip_gpiolib_register()
3087 bank->gpio_chip = rockchip_gpiolib_chip; in rockchip_gpiolib_register()
3089 gc = &bank->gpio_chip; in rockchip_gpiolib_register()
3090 gc->base = bank->pin_base; in rockchip_gpiolib_register()
3091 gc->ngpio = bank->nr_pins; in rockchip_gpiolib_register()
3093 gc->of_node = bank->of_node; in rockchip_gpiolib_register()
3094 gc->label = bank->name; in rockchip_gpiolib_register()
3096 ret = gpiochip_add_data(gc, bank); in rockchip_gpiolib_register()
3109 for (--i, --bank; i >= 0; --i, --bank) { in rockchip_gpiolib_register()
3110 if (!bank->valid) in rockchip_gpiolib_register()
3112 gpiochip_remove(&bank->gpio_chip); in rockchip_gpiolib_register()
3121 struct rockchip_pin_bank *bank = ctrl->pin_banks; in rockchip_gpiolib_unregister() local
3124 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_gpiolib_unregister()
3125 if (!bank->valid) in rockchip_gpiolib_unregister()
3127 gpiochip_remove(&bank->gpio_chip); in rockchip_gpiolib_unregister()
3133 static int rockchip_get_bank_data(struct rockchip_pin_bank *bank, in rockchip_get_bank_data() argument
3139 if (of_address_to_resource(bank->of_node, 0, &res)) { in rockchip_get_bank_data()
3144 bank->reg_base = devm_ioremap_resource(info->dev, &res); in rockchip_get_bank_data()
3145 if (IS_ERR(bank->reg_base)) in rockchip_get_bank_data()
3146 return PTR_ERR(bank->reg_base); in rockchip_get_bank_data()
3152 if (of_device_is_compatible(bank->of_node, in rockchip_get_bank_data()
3156 node = of_parse_phandle(bank->of_node->parent, in rockchip_get_bank_data()
3159 if (of_address_to_resource(bank->of_node, 1, &res)) { in rockchip_get_bank_data()
3171 bank->regmap_pull = devm_regmap_init_mmio(info->dev, in rockchip_get_bank_data()
3177 bank->irq = irq_of_parse_and_map(bank->of_node, 0); in rockchip_get_bank_data()
3179 bank->clk = of_clk_get(bank->of_node, 0); in rockchip_get_bank_data()
3180 if (IS_ERR(bank->clk)) in rockchip_get_bank_data()
3181 return PTR_ERR(bank->clk); in rockchip_get_bank_data()
3183 return clk_prepare(bank->clk); in rockchip_get_bank_data()
3197 struct rockchip_pin_bank *bank; in rockchip_pinctrl_get_soc_data() local
3207 bank = ctrl->pin_banks; in rockchip_pinctrl_get_soc_data()
3208 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_pinctrl_get_soc_data()
3209 if (!strcmp(bank->name, np->name)) { in rockchip_pinctrl_get_soc_data()
3210 bank->of_node = np; in rockchip_pinctrl_get_soc_data()
3212 if (!rockchip_get_bank_data(bank, d)) in rockchip_pinctrl_get_soc_data()
3213 bank->valid = true; in rockchip_pinctrl_get_soc_data()
3224 bank = ctrl->pin_banks; in rockchip_pinctrl_get_soc_data()
3225 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_pinctrl_get_soc_data()
3228 raw_spin_lock_init(&bank->slock); in rockchip_pinctrl_get_soc_data()
3229 bank->drvdata = d; in rockchip_pinctrl_get_soc_data()
3230 bank->pin_base = ctrl->nr_pins; in rockchip_pinctrl_get_soc_data()
3231 ctrl->nr_pins += bank->nr_pins; in rockchip_pinctrl_get_soc_data()
3235 struct rockchip_iomux *iom = &bank->iomux[j]; in rockchip_pinctrl_get_soc_data()
3236 struct rockchip_drv *drv = &bank->drv[j]; in rockchip_pinctrl_get_soc_data()
3239 if (bank_pins >= bank->nr_pins) in rockchip_pinctrl_get_soc_data()
3300 if (ctrl->iomux_recalced[j].num == bank->bank_num) { in rockchip_pinctrl_get_soc_data()
3302 bank->recalced_mask |= BIT(pin); in rockchip_pinctrl_get_soc_data()
3310 if (ctrl->iomux_routes[j].bank_num == bank->bank_num) { in rockchip_pinctrl_get_soc_data()
3312 bank->route_mask |= BIT(pin); in rockchip_pinctrl_get_soc_data()