Searched refs:adpa (Results 1 – 4 of 4) sorted by relevance
157 u32 adpa; in intel_crt_set_dpms() local160 adpa = ADPA_HOTPLUG_BITS; in intel_crt_set_dpms()162 adpa = 0; in intel_crt_set_dpms()165 adpa |= ADPA_HSYNC_ACTIVE_HIGH; in intel_crt_set_dpms()167 adpa |= ADPA_VSYNC_ACTIVE_HIGH; in intel_crt_set_dpms()173 adpa |= ADPA_PIPE_SEL_CPT(crtc->pipe); in intel_crt_set_dpms()175 adpa |= ADPA_PIPE_SEL(crtc->pipe); in intel_crt_set_dpms()182 adpa |= ADPA_DAC_ENABLE; in intel_crt_set_dpms()185 adpa |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE; in intel_crt_set_dpms()188 adpa |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE; in intel_crt_set_dpms()[all …]
93 u32 adpa, dpll_md; in cdv_intel_crt_mode_set() local113 adpa = 0; in cdv_intel_crt_mode_set()115 adpa |= ADPA_HSYNC_ACTIVE_HIGH; in cdv_intel_crt_mode_set()117 adpa |= ADPA_VSYNC_ACTIVE_HIGH; in cdv_intel_crt_mode_set()120 adpa |= ADPA_PIPE_A_SELECT; in cdv_intel_crt_mode_set()122 adpa |= ADPA_PIPE_B_SELECT; in cdv_intel_crt_mode_set()124 REG_WRITE(adpa_reg, adpa); in cdv_intel_crt_mode_set()
575 hw->adpa = INREG(ADPA); in intelfbhw_read_hw_state()803 printk(" ADPA: 0x%08x\n", hw->adpa); in intelfbhw_print_hw_state()1086 hw->adpa &= ~ADPA_USE_VGA_HVPOLARITY; in intelfbhw_mode_to_hw()1093 hw->adpa &= ~((ADPA_SYNC_ACTIVE_MASK << ADPA_VSYNC_ACTIVE_SHIFT) | in intelfbhw_mode_to_hw()1095 hw->adpa |= (hsync_pol << ADPA_HSYNC_ACTIVE_SHIFT) | in intelfbhw_mode_to_hw()1099 hw->adpa &= ~(PIPE_MASK << ADPA_PIPE_SELECT_SHIFT); in intelfbhw_mode_to_hw()1100 hw->adpa |= (pipe << ADPA_PIPE_SELECT_SHIFT); in intelfbhw_mode_to_hw()1103 hw->adpa &= ~ADPA_DPMS_CONTROL_MASK; in intelfbhw_mode_to_hw()1104 hw->adpa |= ADPA_DPMS_D0; in intelfbhw_mode_to_hw()1106 hw->adpa |= ADPA_DAC_ENABLE; in intelfbhw_mode_to_hw()[all …]
200 u32 adpa; member
