157 	u32 adpa;  in intel_crt_set_dpms()  local
160 		adpa = ADPA_HOTPLUG_BITS;  in intel_crt_set_dpms()
162 		adpa = 0;  in intel_crt_set_dpms()
165 		adpa |= ADPA_HSYNC_ACTIVE_HIGH;  in intel_crt_set_dpms()
167 		adpa |= ADPA_VSYNC_ACTIVE_HIGH;  in intel_crt_set_dpms()
173 		adpa |= ADPA_PIPE_SEL_CPT(crtc->pipe);  in intel_crt_set_dpms()
175 		adpa |= ADPA_PIPE_SEL(crtc->pipe);  in intel_crt_set_dpms()
182 		adpa |= ADPA_DAC_ENABLE;  in intel_crt_set_dpms()
185 		adpa |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;  in intel_crt_set_dpms()
188 		adpa |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;  in intel_crt_set_dpms()
191 		adpa |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;  in intel_crt_set_dpms()
195 	I915_WRITE(crt->adpa_reg, adpa);  in intel_crt_set_dpms()
414 	u32 adpa;  in intel_ironlake_crt_detect_hotplug()  local
424 		save_adpa = adpa = I915_READ(crt->adpa_reg);  in intel_ironlake_crt_detect_hotplug()
425 		DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);  in intel_ironlake_crt_detect_hotplug()
427 		adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;  in intel_ironlake_crt_detect_hotplug()
429 			adpa &= ~ADPA_DAC_ENABLE;  in intel_ironlake_crt_detect_hotplug()
431 		I915_WRITE(crt->adpa_reg, adpa);  in intel_ironlake_crt_detect_hotplug()
446 	adpa = I915_READ(crt->adpa_reg);  in intel_ironlake_crt_detect_hotplug()
447 	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)  in intel_ironlake_crt_detect_hotplug()
451 	DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);  in intel_ironlake_crt_detect_hotplug()
462 	u32 adpa;  in valleyview_crt_detect_hotplug()  local
480 	save_adpa = adpa = I915_READ(crt->adpa_reg);  in valleyview_crt_detect_hotplug()
481 	DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);  in valleyview_crt_detect_hotplug()
483 	adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;  in valleyview_crt_detect_hotplug()
485 	I915_WRITE(crt->adpa_reg, adpa);  in valleyview_crt_detect_hotplug()
496 	adpa = I915_READ(crt->adpa_reg);  in valleyview_crt_detect_hotplug()
497 	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)  in valleyview_crt_detect_hotplug()
502 	DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);  in valleyview_crt_detect_hotplug()
890 		u32 adpa;  in intel_crt_reset()  local
892 		adpa = I915_READ(crt->adpa_reg);  in intel_crt_reset()
893 		adpa &= ~ADPA_CRT_HOTPLUG_MASK;  in intel_crt_reset()
894 		adpa |= ADPA_HOTPLUG_BITS;  in intel_crt_reset()
895 		I915_WRITE(crt->adpa_reg, adpa);  in intel_crt_reset()
898 		DRM_DEBUG_KMS("crt adpa set to 0x%x\n", adpa);  in intel_crt_reset()
934 	u32 adpa;  in intel_crt_init()  local
943 	adpa = I915_READ(adpa_reg);  in intel_crt_init()
944 	if ((adpa & ADPA_DAC_ENABLE) == 0) {  in intel_crt_init()
953 		I915_WRITE(adpa_reg, adpa | ADPA_DAC_ENABLE |  in intel_crt_init()
957 		I915_WRITE(adpa_reg, adpa);  in intel_crt_init()