Home
last modified time | relevance | path

Searched refs:acr (Results 1 – 25 of 43) sorted by relevance

12

/Linux-v4.19/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/
Dacr_r352.c76 acr_r352_generate_flcn_bl_desc(const struct nvkm_acr *acr, in acr_r352_generate_flcn_bl_desc() argument
241 acr_r352_ls_ucode_img_load(const struct acr_r352 *acr, in acr_r352_ls_ucode_img_load() argument
245 const struct nvkm_subdev *subdev = acr->base.subdev; in acr_r352_ls_ucode_img_load()
255 ret = acr->func->ls_func[falcon_id]->load(sb, &img->base); in acr_r352_ls_ucode_img_load()
298 acr_r352_ls_img_fill_headers(struct acr_r352 *acr, in acr_r352_ls_img_fill_headers() argument
306 acr->func->ls_func[_img->falcon_id]; in acr_r352_ls_img_fill_headers()
310 whdr->bootstrap_owner = acr->base.boot_falcon; in acr_r352_ls_img_fill_headers()
314 if (acr->lazy_bootstrap & BIT(_img->falcon_id)) in acr_r352_ls_img_fill_headers()
358 if (_img->falcon_id == acr->base.boot_falcon) in acr_r352_ls_img_fill_headers()
378 acr_r352_ls_fill_headers(struct acr_r352 *acr, struct list_head *imgs) in acr_r352_ls_fill_headers() argument
[all …]
Dbase.c108 if ((falcon_mask | sb->acr->managed_falcons) != sb->acr->managed_falcons) { in nvkm_secboot_reset()
113 return sb->acr->func->reset(sb->acr, sb, falcon_mask); in nvkm_secboot_reset()
125 return sb->acr->managed_falcons & BIT(fid); in nvkm_secboot_is_managed()
134 switch (sb->acr->boot_falcon) { in nvkm_secboot_oneinit()
146 nvkm_secboot_falcon_name[sb->acr->boot_falcon]); in nvkm_secboot_oneinit()
195 nvkm_secboot_ctor(const struct nvkm_secboot_func *func, struct nvkm_acr *acr, in nvkm_secboot_ctor() argument
203 sb->acr = acr; in nvkm_secboot_ctor()
204 acr->subdev = &sb->subdev; in nvkm_secboot_ctor()
207 for_each_set_bit(fid, &sb->acr->managed_falcons, in nvkm_secboot_ctor()
Dgm200.c68 ret = sb->acr->func->load(sb->acr, falcon, blob, vma->addr); in gm200_secboot_run_blob()
129 if (sb->acr->func->oneinit) { in gm200_secboot_oneinit()
130 ret = sb->acr->func->oneinit(sb->acr, sb); in gm200_secboot_oneinit()
143 if (sb->acr->func->fini) in gm200_secboot_fini()
144 ret = sb->acr->func->fini(sb->acr, sb, suspend); in gm200_secboot_fini()
154 sb->acr->func->dtor(sb->acr); in gm200_secboot_dtor()
178 struct nvkm_acr *acr; in gm200_secboot_new() local
180 acr = acr_r361_new(BIT(NVKM_SECBOOT_FALCON_FECS) | in gm200_secboot_new()
182 if (IS_ERR(acr)) in gm200_secboot_new()
183 return PTR_ERR(acr); in gm200_secboot_new()
[all …]
Dgp108.c30 struct nvkm_acr *acr; in gp108_secboot_new() local
32 acr = acr_r370_new(NVKM_SECBOOT_FALCON_SEC2, in gp108_secboot_new()
36 if (IS_ERR(acr)) in gp108_secboot_new()
37 return PTR_ERR(acr); in gp108_secboot_new()
40 acr->func->dtor(acr); in gp108_secboot_new()
45 return nvkm_secboot_ctor(&gp102_secboot, acr, device, index, &gsb->base); in gp108_secboot_new()
Dacr_r367.c109 acr_r367_ls_ucode_img_load(const struct acr_r352 *acr, in acr_r367_ls_ucode_img_load() argument
113 const struct nvkm_subdev *subdev = acr->base.subdev; in acr_r367_ls_ucode_img_load()
123 ret = acr->func->ls_func[falcon_id]->load(sb, &img->base); in acr_r367_ls_ucode_img_load()
154 acr_r367_ls_img_fill_headers(struct acr_r352 *acr, in acr_r367_ls_img_fill_headers() argument
162 acr->func->ls_func[_img->falcon_id]; in acr_r367_ls_img_fill_headers()
166 whdr->bootstrap_owner = acr->base.boot_falcon; in acr_r367_ls_img_fill_headers()
171 if (acr->lazy_bootstrap & BIT(_img->falcon_id)) in acr_r367_ls_img_fill_headers()
215 if (_img->falcon_id == acr->base.boot_falcon) in acr_r367_ls_img_fill_headers()
232 acr_r367_ls_fill_headers(struct acr_r352 *acr, struct list_head *imgs) in acr_r367_ls_fill_headers() argument
256 offset = acr_r367_ls_img_fill_headers(acr, img, offset); in acr_r367_ls_fill_headers()
[all …]
Dgp10b.c55 struct nvkm_acr *acr; in gp10b_secboot_new() local
57 acr = acr_r352_new(BIT(NVKM_SECBOOT_FALCON_FECS) | in gp10b_secboot_new()
60 if (IS_ERR(acr)) in gp10b_secboot_new()
61 return PTR_ERR(acr); in gp10b_secboot_new()
70 ret = nvkm_secboot_ctor(&gp10b_secboot, acr, device, index, &gsb->base); in gp10b_secboot_new()
Dgm20b.c109 struct nvkm_acr *acr; in gm20b_secboot_new() local
111 acr = acr_r352_new(BIT(NVKM_SECBOOT_FALCON_FECS) | in gm20b_secboot_new()
113 if (IS_ERR(acr)) in gm20b_secboot_new()
114 return PTR_ERR(acr); in gm20b_secboot_new()
116 acr->optional_falcons = BIT(NVKM_SECBOOT_FALCON_PMU); in gm20b_secboot_new()
125 ret = nvkm_secboot_ctor(&gm20b_secboot, acr, device, index, &gsb->base); in gm20b_secboot_new()
Dacr_r364.c63 acr_r364_fixup_hs_desc(struct acr_r352 *acr, struct nvkm_secboot *sb, in acr_r364_fixup_hs_desc() argument
67 struct nvkm_gpuobj *ls_blob = acr->ls_blob; in acr_r364_fixup_hs_desc()
74 if (acr->func->shadow_blob) in acr_r364_fixup_hs_desc()
85 if (acr->func->shadow_blob) in acr_r364_fixup_hs_desc()
Dgp102.c150 struct nvkm_acr *acr; in gp102_secboot_new() local
152 acr = acr_r367_new(NVKM_SECBOOT_FALCON_SEC2, in gp102_secboot_new()
156 if (IS_ERR(acr)) in gp102_secboot_new()
157 return PTR_ERR(acr); in gp102_secboot_new()
166 ret = nvkm_secboot_ctor(&gp102_secboot, acr, device, index, &gsb->base); in gp102_secboot_new()
Dls_ucode_msgqueue.c121 acr_ls_pmu_post_run(const struct nvkm_acr *acr, const struct nvkm_secboot *sb) in acr_ls_pmu_post_run() argument
133 nvkm_secboot_falcon_name[acr->boot_falcon]); in acr_ls_pmu_post_run()
158 acr_ls_sec2_post_run(const struct nvkm_acr *acr, const struct nvkm_secboot *sb) in acr_ls_sec2_post_run() argument
195 nvkm_secboot_falcon_name[acr->boot_falcon]); in acr_ls_sec2_post_run()
201 nvkm_secboot_falcon_name[acr->boot_falcon]); in acr_ls_sec2_post_run()
Dacr_r361.c31 acr_r361_generate_flcn_bl_desc(const struct nvkm_acr *acr, in acr_r361_generate_flcn_bl_desc() argument
100 acr_r361_generate_pmu_bl_desc(const struct nvkm_acr *acr, in acr_r361_generate_pmu_bl_desc() argument
105 const struct nvkm_pmu *pmu = acr->subdev->device->pmu; in acr_r361_generate_pmu_bl_desc()
137 acr_r361_generate_sec2_bl_desc(const struct nvkm_acr *acr, in acr_r361_generate_sec2_bl_desc() argument
142 const struct nvkm_sec2 *sec = acr->subdev->device->sec2; in acr_r361_generate_sec2_bl_desc()
Dacr_r370.c31 acr_r370_generate_flcn_bl_desc(const struct nvkm_acr *acr, in acr_r370_generate_flcn_bl_desc() argument
69 acr_r370_generate_sec2_bl_desc(const struct nvkm_acr *acr, in acr_r370_generate_sec2_bl_desc() argument
74 const struct nvkm_sec2 *sec = acr->subdev->device->sec2; in acr_r370_generate_sec2_bl_desc()
Dacr_r352.h143 #define acr_r352(acr) container_of(acr, struct acr_r352, base) argument
Dacr_r375.c30 acr_r375_generate_pmu_bl_desc(const struct nvkm_acr *acr, in acr_r375_generate_pmu_bl_desc() argument
35 const struct nvkm_pmu *pmu = acr->subdev->device->pmu; in acr_r375_generate_pmu_bl_desc()
/Linux-v4.19/arch/arm/mach-omap2/
Domap-smp.c82 u32 acr, revidr; in omap5_erratum_workaround_801819() local
90 asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr)); in omap5_erratum_workaround_801819()
99 if ((acr & acr_mask) == acr_mask) in omap5_erratum_workaround_801819()
102 acr |= acr_mask; in omap5_erratum_workaround_801819()
103 omap_smc1(OMAP5_DRA7_MON_SET_ACR_INDEX, acr); in omap5_erratum_workaround_801819()
128 u32 acr, acr_mask; in omap5_secondary_harden_predictor() local
130 asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr)); in omap5_secondary_harden_predictor()
138 if ((acr & acr_mask) == acr_mask) in omap5_secondary_harden_predictor()
141 acr |= acr_mask; in omap5_secondary_harden_predictor()
142 omap_smc1(OMAP5_DRA7_MON_SET_ACR_INDEX, acr); in omap5_secondary_harden_predictor()
Domap-secure.c147 u32 acr; in rx51_secure_update_aux_cr() local
150 asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr)); in rx51_secure_update_aux_cr()
151 acr &= ~clear_bits; in rx51_secure_update_aux_cr()
152 acr |= set_bits; in rx51_secure_update_aux_cr()
157 1, acr, 0, 0, 0); in rx51_secure_update_aux_cr()
/Linux-v4.19/drivers/gpu/drm/radeon/
Ddce3_1_afmt.c171 const struct radeon_hdmi_acr *acr) in dce3_2_hdmi_update_acr() argument
181 HDMI0_ACR_CTS_32(acr->cts_32khz), in dce3_2_hdmi_update_acr()
184 HDMI0_ACR_N_32(acr->n_32khz), in dce3_2_hdmi_update_acr()
188 HDMI0_ACR_CTS_44(acr->cts_44_1khz), in dce3_2_hdmi_update_acr()
191 HDMI0_ACR_N_44(acr->n_44_1khz), in dce3_2_hdmi_update_acr()
195 HDMI0_ACR_CTS_48(acr->cts_48khz), in dce3_2_hdmi_update_acr()
198 HDMI0_ACR_N_48(acr->n_48khz), in dce3_2_hdmi_update_acr()
Dr600_hdmi.c178 const struct radeon_hdmi_acr *acr) in r600_hdmi_update_acr() argument
193 HDMI0_ACR_CTS_32(acr->cts_32khz), in r600_hdmi_update_acr()
196 HDMI0_ACR_N_32(acr->n_32khz), in r600_hdmi_update_acr()
200 HDMI0_ACR_CTS_44(acr->cts_44_1khz), in r600_hdmi_update_acr()
203 HDMI0_ACR_N_44(acr->n_44_1khz), in r600_hdmi_update_acr()
207 HDMI0_ACR_CTS_48(acr->cts_48khz), in r600_hdmi_update_acr()
210 HDMI0_ACR_N_48(acr->n_48khz), in r600_hdmi_update_acr()
Devergreen_hdmi.c68 const struct radeon_hdmi_acr *acr) in evergreen_hdmi_update_acr() argument
87 WREG32(HDMI_ACR_32_0 + offset, HDMI_ACR_CTS_32(acr->cts_32khz)); in evergreen_hdmi_update_acr()
88 WREG32(HDMI_ACR_32_1 + offset, acr->n_32khz); in evergreen_hdmi_update_acr()
90 WREG32(HDMI_ACR_44_0 + offset, HDMI_ACR_CTS_44(acr->cts_44_1khz)); in evergreen_hdmi_update_acr()
91 WREG32(HDMI_ACR_44_1 + offset, acr->n_44_1khz); in evergreen_hdmi_update_acr()
93 WREG32(HDMI_ACR_48_0 + offset, HDMI_ACR_CTS_48(acr->cts_48khz)); in evergreen_hdmi_update_acr()
94 WREG32(HDMI_ACR_48_1 + offset, acr->n_48khz); in evergreen_hdmi_update_acr()
/Linux-v4.19/sound/soc/sh/
Ddma-sh7760.c221 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); in dmabrg_play_dma_start() local
223 BRGREG(BRGACR) = acr | ACR_TDE | ACR_TAR | ACR_TAM_2WORD; in dmabrg_play_dma_start()
228 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); in dmabrg_play_dma_stop() local
230 BRGREG(BRGACR) = acr | ACR_TDS; in dmabrg_play_dma_stop()
235 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); in dmabrg_rec_dma_start() local
237 BRGREG(BRGACR) = acr | ACR_RDE | ACR_RAR | ACR_RAM_2WORD; in dmabrg_rec_dma_start()
242 unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS); in dmabrg_rec_dma_stop() local
244 BRGREG(BRGACR) = acr | ACR_RDS; in dmabrg_rec_dma_stop()
/Linux-v4.19/sound/aoa/codecs/
Dtas.c94 u8 acr; member
492 ucontrol->value.enumerated.item[0] = !!(tas->acr & TAS_ACR_INPUT_B); in tas_snd_capture_source_get()
506 oldacr = tas->acr; in tas_snd_capture_source_put()
513 tas->acr &= ~(TAS_ACR_INPUT_B | TAS_ACR_B_MONAUREAL); in tas_snd_capture_source_put()
515 tas->acr |= TAS_ACR_INPUT_B | TAS_ACR_B_MONAUREAL | in tas_snd_capture_source_put()
517 if (oldacr == tas->acr) { in tas_snd_capture_source_put()
522 tas_write_reg(tas, TAS_REG_ACR, 1, &tas->acr); in tas_snd_capture_source_put()
690 tas->acr |= TAS_ACR_ANALOG_PDOWN; in tas_reset_init()
691 if (tas_write_reg(tas, TAS_REG_ACR, 1, &tas->acr)) in tas_reset_init()
706 tas->acr &= ~TAS_ACR_ANALOG_PDOWN; in tas_reset_init()
[all …]
/Linux-v4.19/arch/arm/kernel/
Dhead-nommu.S224 .macro setup_region bar, acr, sr, side = PMSAv7_DATA_SIDE, unused
226 mcr p15, 0, \acr, c6, c1, (4 + \side) @ I/DRACR
235 .macro setup_region bar, acr, sr, unused, base
236 lsl \acr, \acr, #16
237 orr \acr, \acr, \sr
239 str \acr, [\base, #PMSAv7_RASR]
/Linux-v4.19/arch/powerpc/include/asm/
Dmpc52xx_psc.h177 u8 acr; member
180 #define mpc52xx_psc_acr ipcr_acr.acr
324 u8 acr; /* PSC + 0x1c */ member
/Linux-v4.19/drivers/gpu/drm/nouveau/include/nvkm/subdev/
Dsecboot.h45 struct nvkm_acr *acr; member
/Linux-v4.19/drivers/tty/serial/
Dsunsu.c90 unsigned char acr; member
180 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
183 serial_icr_write(up, UART_ACR, up->acr);
277 up->acr |= UART_ACR_TXDIS; in sunsu_stop_tx()
278 serial_icr_write(up, UART_ACR, up->acr); in sunsu_stop_tx()
295 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) { in sunsu_start_tx()
296 up->acr &= ~UART_ACR_TXDIS; in sunsu_start_tx()
297 serial_icr_write(up, UART_ACR, up->acr); in sunsu_start_tx()
628 up->acr = 0; in sunsu_startup()

12