Searched refs:VCLK (Results 1 – 13 of 13) sorted by relevance
| /Linux-v4.19/drivers/video/fbdev/sis/ |
| D | init.c | 2268 SiS_DoCalcDelay(struct SiS_Private *SiS_Pr, unsigned short MCLK, unsigned short VCLK, in SiS_DoCalcDelay() argument
2272 unsigned int longtemp = VCLK * colordepth; in SiS_DoCalcDelay()
2288 SiS_CalcDelay(struct SiS_Private *SiS_Pr, unsigned short VCLK, in SiS_CalcDelay() argument
2293 temp2 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 0); in SiS_CalcDelay()
2294 temp1 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 1); in SiS_CalcDelay()
2306 unsigned short temp, index, VCLK, MCLK, colorth; in SiS_SetCRT1FIFO_300() local
2313 VCLK = SiS_Pr->CSRClock; in SiS_SetCRT1FIFO_300()
2316 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; in SiS_SetCRT1FIFO_300()
2330 ThresholdLow = SiS_CalcDelay(SiS_Pr, VCLK, colorth, MCLK) + 1; in SiS_SetCRT1FIFO_300()
2407 unsigned short i, data, VCLK, MCLK16, colorth = 0; in SiS_SetCRT1FIFO_630() local
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| D | init301.c | 5339 unsigned short VCLK = 0, MCLK, colorth = 0, data2 = 0; in SiS_SetCRT2FIFO_300() local
5359 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; in SiS_SetCRT2FIFO_300()
5371 VCLK = SiS_Pr->CSRClock_CRT1; in SiS_SetCRT2FIFO_300()
5392 data2 = temp - ((colorth * VCLK) / MCLK); in SiS_SetCRT2FIFO_300()
5449 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; in SiS_SetCRT2FIFO_300()
5454 VCLK = ROMAddr[0x229] | (ROMAddr[0x22a] << 8); in SiS_SetCRT2FIFO_300()
5463 VCLK = SiS_Pr->CSRClock; in SiS_SetCRT2FIFO_300()
5471 data = data * VCLK * colorth; in SiS_SetCRT2FIFO_300()
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| /Linux-v4.19/drivers/usb/misc/sisusbvga/ |
| D | sisusb_init.c | 635 unsigned short data = 0, VCLK = 0, index = 0; in SiS_SetVCLKState() local
639 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; in SiS_SetVCLKState()
642 if (VCLK >= 166) in SiS_SetVCLKState()
646 if (VCLK >= 166) in SiS_SetVCLKState()
651 if (VCLK >= 260) in SiS_SetVCLKState()
653 else if (VCLK >= 160) in SiS_SetVCLKState()
655 else if (VCLK >= 135) in SiS_SetVCLKState()
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| /Linux-v4.19/Documentation/devicetree/bindings/display/ |
| D | amlogic,meson-vpu.txt | 10 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
43 The VENC Unit gets a Pixel Clocks (VCLK) from a dedicated HDMI PLL and clock
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| /Linux-v4.19/drivers/gpu/drm/amd/powerplay/inc/ |
| D | power_state.h | 136 uint32_t VCLK; member
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| /Linux-v4.19/Documentation/gpu/ |
| D | meson.rst | 19 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
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| /Linux-v4.19/Documentation/devicetree/bindings/display/exynos/ |
| D | samsung-fimd.txt | 60 VCLK(internal) __|??????|_____|??????|_____|??????|_____|??????|_____|??
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| /Linux-v4.19/drivers/gpu/drm/amd/powerplay/hwmgr/ |
| D | processpptables.c | 760 ps->uvd_clocks.VCLK = pnon_clock_info->ulVCLK; in init_non_clock_fields()
763 ps->uvd_clocks.VCLK = 0; in init_non_clock_fields()
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| D | smu10_hwmgr.c | 759 smu10_ps->uvd_clocks.vclk = ps->uvd_clocks.VCLK; in smu10_dpm_get_pp_table_entry()
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| D | smu7_hwmgr.c | 3157 power_state->uvd_clocks.VCLK = 0; in smu7_get_pp_table_entry_callback_func_v1()
3250 ps->uvd_clks.vclk = state->uvd_clocks.VCLK; in smu7_get_pp_table_entry_v1()
3398 ps->uvd_clks.vclk = state->uvd_clocks.VCLK; in smu7_get_pp_table_entry_v0()
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| D | smu8_hwmgr.c | 1382 smu8_ps->uvd_clocks.vclk = ps->uvd_clocks.VCLK; in smu8_dpm_get_pp_table_entry()
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| D | vega10_hwmgr.c | 3016 power_state->uvd_clocks.VCLK = 0; in vega10_get_pp_table_entry_callback_func()
3083 ps->uvd_clks.vclk = state->uvd_clocks.VCLK; in vega10_get_pp_table_entry()
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| /Linux-v4.19/drivers/staging/xgifb/ |
| D | vb_setmode.c | 961 short VCLK; in XGI_SetVCLKState() local
967 VCLK = XGI_VCLKData[index].CLOCK; in XGI_SetVCLKState()
971 if (VCLK >= 200) in XGI_SetVCLKState()
982 if (VCLK < 200) in XGI_SetVCLKState()
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