Home
last modified time | relevance | path

Searched refs:UART_CR (Results 1 – 3 of 3) sorted by relevance

/Linux-v4.19/arch/arm/mach-netx/include/mach/
Duncompress.h36 #define UART_CR 0x14 macro
47 if (REG(UART1_BASE + UART_CR) & CR_UART_EN) in putc()
49 else if (REG(UART2_BASE + UART_CR) & CR_UART_EN) in putc()
62 if (REG(UART1_BASE + UART_CR) & CR_UART_EN) in flush()
64 else if (REG(UART2_BASE + UART_CR) & CR_UART_EN) in flush()
/Linux-v4.19/drivers/tty/serial/
Dnetx-serial.c37 UART_CR = 0x14, enumerator
109 val = readl(port->membase + UART_CR); in netx_stop_tx()
110 writel(val & ~CR_TIE, port->membase + UART_CR); in netx_stop_tx()
116 val = readl(port->membase + UART_CR); in netx_stop_rx()
117 writel(val & ~CR_RIE, port->membase + UART_CR); in netx_stop_rx()
123 val = readl(port->membase + UART_CR); in netx_enable_ms()
124 writel(val | CR_MSIE, port->membase + UART_CR); in netx_enable_ms()
161 readl(port->membase + UART_CR) | CR_TIE, port->membase + UART_CR); in netx_start_tx()
311 port->membase + UART_CR); in netx_startup()
319 writel(0, port->membase + UART_CR) ; in netx_shutdown()
[all …]
Dmsm_serial.c63 #define UART_CR 0x0010 macro
391 msm_write(port, UART_CR_CMD_RESET_TX_READY, UART_CR); in msm_wait_for_xmitr()
449 msm_write(port, UART_CR_CMD_RESET_TX, UART_CR); in msm_complete_tx_dma()
450 msm_write(port, UART_CR_TX_ENABLE, UART_CR); in msm_complete_tx_dma()
555 msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR); in msm_complete_rx_dma()
643 msm_write(uart, UART_CR_CMD_RESET_STALE_INT, UART_CR); in msm_start_rx_dma()
644 msm_write(uart, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR); in msm_start_rx_dma()
692 msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR); in msm_handle_rx_dm()
749 msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR); in msm_handle_rx_dm()
751 msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR); in msm_handle_rx_dm()
[all …]