63 #define UART_CR				0x0010  macro
391 	msm_write(port, UART_CR_CMD_RESET_TX_READY, UART_CR);  in msm_wait_for_xmitr()
449 		msm_write(port, UART_CR_CMD_RESET_TX, UART_CR);  in msm_complete_tx_dma()
450 		msm_write(port, UART_CR_TX_ENABLE, UART_CR);  in msm_complete_tx_dma()
555 		msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR);  in msm_complete_rx_dma()
643 	msm_write(uart, UART_CR_CMD_RESET_STALE_INT, UART_CR);  in msm_start_rx_dma()
644 	msm_write(uart, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR);  in msm_start_rx_dma()
692 		msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR);  in msm_handle_rx_dm()
749 		msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR);  in msm_handle_rx_dm()
751 	msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR);  in msm_handle_rx_dm()
769 		msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR);  in msm_handle_rx()
912 	msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR);  in msm_handle_delta_cts()
932 		msm_write(port, UART_CR_CMD_RESET_RXBREAK_START, UART_CR);  in msm_uart_irq()
938 			msm_write(port, val, UART_CR);  in msm_uart_irq()
940 			msm_write(port, val, UART_CR);  in msm_uart_irq()
978 	msm_write(port, UART_CR_CMD_RESET_RX, UART_CR);  in msm_reset()
979 	msm_write(port, UART_CR_CMD_RESET_TX, UART_CR);  in msm_reset()
980 	msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR);  in msm_reset()
981 	msm_write(port, UART_CR_CMD_RESET_BREAK_INT, UART_CR);  in msm_reset()
982 	msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR);  in msm_reset()
983 	msm_write(port, UART_CR_CMD_SET_RFR, UART_CR);  in msm_reset()
999 		msm_write(port, UART_CR_CMD_RESET_RFR, UART_CR);  in msm_set_mctrl()
1009 		msm_write(port, UART_CR_CMD_START_BREAK, UART_CR);  in msm_break_ctl()
1011 		msm_write(port, UART_CR_CMD_STOP_BREAK, UART_CR);  in msm_break_ctl()
1131 	msm_write(port, UART_CR_CMD_PROTECTION_EN, UART_CR);  in msm_set_baud_rate()
1135 	msm_write(port, UART_CR_TX_ENABLE | UART_CR_RX_ENABLE, UART_CR);  in msm_set_baud_rate()
1144 		msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR);  in msm_set_baud_rate()
1146 		msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR);  in msm_set_baud_rate()
1433 			msm_write(port, UART_CR_CMD_FORCE_STALE, UART_CR);  in msm_poll_get_char_dm()
1437 			msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR);  in msm_poll_get_char_dm()
1440 				  UART_CR);  in msm_poll_get_char_dm()