| /Linux-v4.19/arch/x86/include/uapi/asm/ |
| D | ptrace-abi.h | 23 #define SS 16 macro
59 #define SS 160 macro
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| /Linux-v4.19/tools/perf/arch/x86/tests/ |
| D | regs_load.S | 15 #define SS 11 * 8 macro
48 movq $0, SS(%rdi)
85 movl $0, SS(%edi)
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| /Linux-v4.19/arch/x86/um/ |
| D | ptrace_64.c | 42 [SS >> 3] = HOST_SS,
92 case SS: in putreg()
171 case SS: in getreg()
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| D | ptrace_32.c | 71 [SS] = HOST_SS,
107 case SS: in putreg()
153 case SS: in getreg()
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| D | user-offsets.c | 47 DEFINE(HOST_SS, SS); in foo()
76 DEFINE_LONGS(HOST_SS, SS); in foo()
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| D | signal.c | 198 GETREG(SS, ss); in copy_sc_from_user()
280 PUTREG(SS, ss); in copy_sc_to_user()
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| /Linux-v4.19/Documentation/devicetree/bindings/connector/ |
| D | usb-connector.txt | 51 1: Super Speed (SS), present in SS capable connectors,
69 to companion PMIC (max77865), SS lines to USB3 PHY and SBU to DisplayPort.
70 DisplayPort video lines are routed to the connector via SS mux in USB3 PHY.
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| /Linux-v4.19/arch/x86/kernel/ |
| D | ftrace_64.S | 38 #define MCOUNT_REG_SIZE (SS+8 + MCOUNT_FRAME_SIZE)
218 movq %rcx, SS(%rsp)
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| /Linux-v4.19/Documentation/devicetree/bindings/crypto/ |
| D | sun4i-ss.txt | 10 * "mod" : SS controller clock
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| /Linux-v4.19/Documentation/devicetree/bindings/media/ |
| D | renesas,drif.txt | 9 | Master |-----SS-------->|SYNC DRIFn (slave) |
92 | Master |-----SS-------->|SYNC DRIFn (slave) |
140 | Master |-----SS-------->|SYNC DRIFn (slave) |
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| /Linux-v4.19/drivers/memory/ |
| D | ti-aemif.c | 43 #define SS(x) ((x) << SS_SHIFT) macro
65 #define SS_VAL(x) (((x) & SS(SS_MAX)) >> SS_SHIFT)
83 EW(EW_MAX) | SS(SS_MAX) | \
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| /Linux-v4.19/Documentation/devicetree/bindings/usb/ |
| D | qcom,dwc3.txt | 13 "core" Master/Core clock, have to be >= 125 MHz for SS
30 >=125Mhz (125000000) for MASTER_CLK in SS mode
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| D | dwc3-xilinx.txt | 7 "bus_clk" Master/Core clock, have to be >= 125 MHz for SS
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| D | rockchip,dwc3.txt | 10 "bus_clk" Master/Core clock, have to be >= 62.5 MHz for SS
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| D | dwc3.txt | 34 the second element is expected to be a handle to the USB3/SS PHY
45 - snps,u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
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| /Linux-v4.19/Documentation/devicetree/bindings/phy/ |
| D | brcm,sr-pcie-phy.txt | 5 - reg: base address and length of the PCIe SS register space
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| D | qcom-dwc3-usb-phy.txt | 1 Qualcomm DWC3 HS AND SS PHY CONTROLLER
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| /Linux-v4.19/arch/x86/um/os-Linux/ |
| D | mcontext.c | 18 COPY(EIP); COPY_SEG_CPL3(CS); COPY(EFL); COPY_SEG_CPL3(SS); in get_regs_from_mc()
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| /Linux-v4.19/drivers/power/supply/ |
| D | bq24190_charger.c | 355 #undef SS
386 BQ24190_SYSFS_FIELD_RO(vbus_stat, SS, VBUS_STAT),
387 BQ24190_SYSFS_FIELD_RO(chrg_stat, SS, CHRG_STAT),
388 BQ24190_SYSFS_FIELD_RO(dpm_stat, SS, DPM_STAT),
389 BQ24190_SYSFS_FIELD_RO(pg_stat, SS, PG_STAT),
390 BQ24190_SYSFS_FIELD_RO(therm_stat, SS, THERM_STAT),
391 BQ24190_SYSFS_FIELD_RO(vsys_stat, SS, VSYS_STAT),
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| /Linux-v4.19/arch/x86/entry/ |
| D | calling.h | 96 #define SS 20*8 macro
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| D | entry_64.S | 306 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
741 testb $4, (SS-RIP)(%rsp)
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| D | entry_32.S | 322 movl PT_EFLAGS(%esp), %eax # mix EFLAGS, SS and CS
332 jne .Lend_\@ # returning to user-space with LDT SS
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| /Linux-v4.19/tools/perf/arch/x86/util/ |
| D | perf_regs.c | 23 SMPL_REG(SS, PERF_REG_X86_SS),
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| /Linux-v4.19/Documentation/networking/caif/ |
| D | spi_porting.txt | 52 signal a change of state of the input GPIO (SS) to the interface.
120 * SS signal. Once a edge is detected, the ss_cb() function should be
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| /Linux-v4.19/Documentation/devicetree/bindings/bus/ |
| D | qcom,ebi2.txt | 21 memory is referred to as "Chip Peripheral SS FPB0" and is 168MB big.
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